ADUC814BRU Analog Devices Inc, ADUC814BRU Datasheet - Page 51

• Manufacturer Part Number: ADUC814BRU
• Description: A/D Converter (A-D) IC
• Manufacturer: Analog Devices Inc
• Series: MicroConverter® ADuC8xxr

Specifications of ADUC814BRU

• Peak Reflow Compatible (260 C): No
• No. Of Bits: 12 Bit
• Leaded Process Compatible: No
• Mounting Type: Surface Mount
• No. Of Inputs: 6
• Features: +3V Or +5V Operation
• Package / Case: 28-TSSOP
• Rohs Status: RoHS non-compliant
• Core Processor: 8052
• Core Size: 8-Bit
• Speed: 16.78MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: POR, PSM, Temp Sensor, WDT
• Number Of I /o: 17
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 640 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 6x12b; D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With: EVAL-ADUC814QSZ - KIT DEV FOR ADUC814 MICROCONVRTR
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

T2CON
SFR Address
Power-On Default
Bit Addressable
Table 24. T2CON SFR Bit Designations
Bit No.
7
6
5
4
3
2
1
0
Timer/Counter 2 Data Registers
Timer/Counter 2 also has two pairs of 8-bit data registers associated with it. These are used as both timer data registers and timer
capture/reload registers.
TH2 and TL2
SFR Address
RCAP2H and RCAP2L
SFR Address
TF2
Name
TF2
EXF2
RCLK
TCLK
EXEN2
TR2
CNT2
CAP2
Description
Timer 2 Overflow Flag.
Set by hardware on a Timer 2 overflow. TF2 is not set when either RCLK or TCLK = 1.
Cleared by the user software.
Timer 2 External Flag.
Set by hardware when either a capture or reload is caused by a negative transition on T2EX and EXEN2 = 1.
Cleared by the user software.
Receive Clock Enable.
Set by the user to enable the serial port to use Timer 2 overflow pulses for its receive clock in serial port in Modes 1 and 3.
Cleared by the user to enable Timer 1 overflow to be used for the receive clock.
Transmit Clock Enable Bit.
Set by the user to enable the serial port to use Timer 2 overflow pulses for its transmit clock in serial port Modes 1 and 3.
Cleared by the user to enable Timer 1 overflow to be used for the transmit clock.
Timer 2 External Enable Flag.
Set by the user to enable a capture or reload to occur as a result of a negative transition on T2EX if Timer 2 is not being
used to clock the serial port.
Cleared by the user for Timer 2 to ignore events at T2EX.
Timer 2 Start/Stop Control Bit.
Set by the user to start Timer 2.
Cleared by the user to stop Timer 2.
Timer 2 timer or counter function select bit.
Set by the user to select counter function (input from external T2 pin).
Cleared by the user to select timer function (input from on-chip core clock).
Timer 2 Capture/Reload Select Bit.
Set by the user to enable captures on negative transitions at T2EX if EXEN2 = 1.
Cleared by the user to enable autoreloads with Timer 2 overflows or negative transitions at T2EX when EXEN2 = 1.
When either RCLK = 1 or TCLK = 1, this bit is ignored and the timer is forced to autoreload on Timer 2 overflow.
EXF2
Timer/Counter 2 Control Register
C8H
00H
Yes
Timer 2, data high byte and low byte.
Timer 2, Capture/Reload byte and low byte.
CDH, CCH, respectively
CBH, CAH, respectively
RCLK
TCLK
Rev. A | Page 51 of 72
EXEN2
TR2
CNT2
ADuC814
CAP2