ADUC814BRU Analog Devices Inc, ADUC814BRU Datasheet - Page 66

• Manufacturer Part Number: ADUC814BRU
• Description: A/D Converter (A-D) IC
• Manufacturer: Analog Devices Inc
• Series: MicroConverter® ADuC8xxr

Specifications of ADUC814BRU

• Peak Reflow Compatible (260 C): No
• No. Of Bits: 12 Bit
• Leaded Process Compatible: No
• Mounting Type: Surface Mount
• No. Of Inputs: 6
• Features: +3V Or +5V Operation
• Package / Case: 28-TSSOP
• Rohs Status: RoHS non-compliant
• Core Processor: 8052
• Core Size: 8-Bit
• Speed: 16.78MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: POR, PSM, Temp Sensor, WDT
• Number Of I /o: 17
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 640 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 6x12b; D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With: EVAL-ADUC814QSZ - KIT DEV FOR ADUC814 MICROCONVRTR
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

ADuC814
Table 36. SPI Master Mode Timing (CPHA = 1)
Parameter
t
t
t
t
t
t
t
t
t
1
SL
SH
DAV
DSU
DHD
DF
DR
SR
SF
Characterized under the following conditions:
a. Core clock divider bits CD2, CD1, and CD0 in PLLCON SFR set to 0, 1, and 1, respectively, i.e., core clock frequency = 2.09 MHz.
b. SPI bit-rate selection bits SPR1 and SPR0 bits in SPICON SFR set to 0 and 0, respectively.
SCLOCK Low Pulse Width
SCLOCK High Pulse Width
Data Output Valid after SCLOCK Edge
Data Input Setup Time before SCLOCK Edge
Data Input Hold Time after SCLOCK Edge
Data Output Fall Time
Data Output Rise Time
SCLOCK Rise Time
SCLOCK Fall Time
(CPOL = 0)
(CPOL = 1)
SCLOCK
SCLOCK
MOSI
MISO
1
1
t
DAV
t
SH
t
DSU
Figure 63. SPI Master Mode Timing (CPHA = 1)
MSB IN
t
DHD
MSB
t
SL
Rev. A | Page 66 of 72
t
DF
t
DR
BITS 6–1
BITS 6–1
t
SR
Min
100
100
LSB IN
t
SF
LSB
Typ
630
630
10
10
10
10
Max
50
25
25
25
25
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns