CS4244-CNZ Cirrus Logic Inc, CS4244-CNZ Datasheet - Page 35

• Manufacturer Part Number: CS4244-CNZ
• Description: IC 4 Input / 5 Output CODEC
• Manufacturer: Cirrus Logic Inc

DS900PP2
4.6.2
4.6.2.1
AINx+ and AINx- are line-level differential analog inputs. An internal bias to VQ (approximately VA/2) can
be enabled or disabled via the ADCx CM bits in the
levels are scaled according to VA and can be found in the Analog Input Characteristics tables on pages
11
The ADC output data is in two’s complement binary format. For inputs above positive full scale or below
negative full scale, the ADC will output 7FFFFFH or 800000H, respectively, and cause the ADC Overflow
bit in the
4.6.2.2
The analog modulator samples the input at 6.144 MHz (internal MCLK = 12.288 MHz). The digital filter
will reject signals within the stopband of the filter. However, there is no rejection for input signals which
are multiples of the digital passband frequency (n
a recommended analog input filter that will attenuate any noise energy at 6.144 MHz, in addition to pro-
viding the optimum source impedance for the modulators. The use of capacitors that have a large voltage
coefficient (such as general-purpose ceramics) must be avoided since these can degrade signal linearity.
ADC Path
AIN1 (±)
AIN2 (±)
AIN3 (±)
AIN4 (±)
and 12.
1.8 to 5.0 VDC
VL
Interrupt Notification 1
Analog Inputs
Active ADC Input Filter
Multi-bit
 ADC
SDOUT1
Digital Filters
SDOUT2
Channel Volume ,
SDIN2
Mute, Invert,
Noise Gate
register to be set to a ‘1’.
Serial Audio Interface
SDIN1
2.5 V
Figure 23. ADC Path
2.5 VDC
Clock / LRCK
Frame Sync
VD
Volume
Control
Master
Level Translator

LDO
6.144 MHz), where n = 0,1,2,... Refer to
Master Clock In
"SP Data Sel."
5.0 VDC
VA
Interpolation
Filter
Analog Supply
Serial Clock
In/ Out
register. The full-scale analog input
Multi-bit 
Modulators
INT
Control Port
RST
DAC &
Analog
Filters
I
2
C Control
Data
Figure 24
CS4244
AOUT1 (±)
AOUT2 (±)
AOUT3 (±)
AOUT4 (±)
for
35