CS4244-CNZ Cirrus Logic Inc, CS4244-CNZ Datasheet - Page 6

• Manufacturer Part Number: CS4244-CNZ
• Description: IC 4 Input / 5 Output CODEC
• Manufacturer: Cirrus Logic Inc

DS900PP2
1.1
VA
VQ
VREF
VBIAS
AOUTx-
AOUTx+
TSTOx
RST
INT
AD2/SDOUT2
AD1
AD0
SCL
GND
I/O Pin Characteristics
Input and output levels and associated power supply voltage are shown in the table below. Logic levels
should not exceed the corresponding power supply voltage.
Notes:
Power Supply
1. Internal connection valid when device is in reset.
2. This pin has no internal pull-up or pull-down resistors. External pull-up or pull-down resistors should
VL
be added in accordance with
25,27,29,
26,28,30,
33,34
20
22
23
24
31
32
35
36
37
38
39
40
-
AD2/SDOUT2 Input/Output 5.0 V CMOS
Analog Power (Input) - Positive power for the analog sections.
Quiescent Voltage (Output) - Filter connection for internal quiescent voltage.
Analog Power Reference (Input) - Return pin for the VBIAS cap.
Positive Voltage Reference (Output) - Positive reference voltage for the internal DACs.
Negative Analog Output (Output) - Negative output signals from the internal digital to analog con-
verters. The full scale analog output level is specified in the
tables on pages
Positive Analog Output (Output) - Positive output signals from the internal digital to analog con-
verters. The full scale analog output level is specified in the
tables on pages
Test Outputs (Output) - Test outputs. These pins should be left unconnected.
Reset (Input) - Applies reset to the internal circuitry when pulled low.
Interrupt (Output) - Sent to DSP to indicate an interrupt condition has occurred.
I²C Address Bit 2 / Serial Data Output 2 (Input/Output) - Sets the I²C address bit 2 at reset. Func-
tions as Serial Data Out 2 for AIN3 and AIN4 ADC data output in Left Justified and I²S modes. High
impedance in TDM mode. See
operation.
I²C Address Bit 1 (Input) - Sets the I²C address bit 1.
I²C Address Bit 0 (Input) - Sets the I²C address bit 0.
Serial Control Port Clock (Input) - Serial clock for the I²C control port.
Thermal Pad - The thermal pad on the bottom of the device should be connected to the ground
plane via an array of vias.
Pin Name
FS/LRCK
SDOUT1
SDINx
MCLK
AD0,1
SCLK
SDA
RST
SCL
INT
Input/Output
Input/Output 5.0 V CMOS Weak Pull-down (~500k 5.0 V CMOS, with Hysteresis
Input/Output 5.0 V CMOS Weak Pull-down (~500k 5.0 V CMOS, with Hysteresis
Output
Output
15
15
Input
Input
Input
Input
Input
I/O
and
and
Figure
16
16
CMOS/Open
CMOS/Open
5.0 V CMOS Weak Pull-down (~500k
.
.
2.
Section 4.3 I²C Control Port
Driver
Drain
Drain
-
-
-
-
-
Weak Pull-down (~500k 5.0 V CMOS, with Hysteresis
Weak Pull-down (~500k 5.0 V CMOS, with Hysteresis
Weak Pull-down (~500k 5.0 V CMOS, with Hysteresis
Weak Pull-down (~500k 5.0 V CMOS, with Hysteresis
Internal Connections
(Note 1)
(Note 2)
(Note 2)
(Note 2)
(Note 2)
for more details concerning this mode of
Analog Output Characteristics
Analog Output Characteristics
5.0 V CMOS, with Hysteresis
5.0 V CMOS
5.0 V CMOS
Receiver
-
CS4244
6