CY7C1471V33-133AXC Cypress Semiconductor Corp, CY7C1471V33-133AXC Datasheet - Page 34

• Manufacturer Part Number: CY7C1471V33-133AXC
• Description: SRAM (Static RAM)
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C1471V33-133AXC

• Format - Memory: RAM
• Memory Type: SRAM - Synchronous
• Memory Size: 72M (2M x 36)
• Speed: 133MHz
• Interface: Parallel
• Voltage - Supply: 3.135 V ~ 3.6 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 100-LQFP
• Density: 72Mb
• Access Time (max): 6.5ns
• Sync/async: Synchronous
• Architecture: SDR
• Clock Freq (max): 133MHz
• Operating Supply Voltage (typ): 3.3V
• Address Bus: 21b
• Package Type: TQFP
• Operating Temp Range: 0C to 70C
• Number Of Ports: 4
• Supply Current: 305mA
• Operating Supply Voltage (min): 3.135V
• Operating Supply Voltage (max): 3.6V
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 100
• Word Size: 36b
• Number Of Words: 2M
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 428-2167; CY7C1471V33-133AXC

Document History Page
Document Number: 38-05288 Rev. *L
Document Title: CY7C1471V33/CY7C1473V33/CY7C1475V33, 72-Mbit (2 M × 36/4 M × 18/1 M × 72) Flow-through SRAM with
NoBL™ Architecture
Document Number: 38-05288
REV.
*G
*A
*B
*C
*D
*E
*F
*H
**
ECN NO.
121521
223721
235012
243572
320197
331513
416221
114675
299511
Submission
See ECN
See ECN
See ECN
See ECN
See ECN
See ECN
See ECN
08/06/02
02/07/03
Date
Orig. of Change
CJM
RYQ
RXU
PKS
NJY
NJY
SYT
PCI
PCI
New Data Sheet
Updated features for package offering
Updated ordering information
Changed Advanced Information to Preliminary
Changed timing diagrams
Changed logic block diagrams
Modified Functional Description
Modified “Functional Overview” section
Added boundary scan order for all packages
Included thermal numbers and capacitance values for all packages
Removed 150-MHz speed grade offering
Included ISB and IDD values
Changed package outline for 165FBGA package and 209-Ball BGA package
Removed 119-BGA package offering
Minor Change: The data sheets do not match on the spec system and
external web
Changed ball H2 from V
Modified capacitance values on page 21
Removed 117-MHz Speed Bin
Changed 
TQFP Package on Page # 21
Added Pb-free information for 100-Pin TQFP, 165 FBGA and 209 BGA
Packages
Added comment of ‘Pb-free BG packages availability’ below the Ordering
Information
Corrected part number typos in the logic block diagram on page# 2
Address expansion pins/balls in the pinouts for all packages are modified as
per JEDEC standard
Added Address Expansion pins in the Pin Definitions Table
Added Industrial Operating Range
Modified V
Updated Ordering Information Table
Converted from Preliminary to Final
Changed address of Cypress Semiconductor Corporation on Page# 1 from
“3901 North First Street” to “198 Champion Court”
Removed 100MHz Speed bin & Added 117MHz Speed bin
Changed the description of I
Current on page# 19
Changed the I
to –30 A and 5 A
Changed the I
to –5 A and 30 A
Changed V
Replaced Package Name column with Package Diagram in the Ordering
Information table
Updated the Ordering Information Table
OL
IH
JA
, V
< V
from 16.8 to 24.63 C/W and 
X
X
OH
current values of MODE on page # 19 from –5 A and 30 A
current values of ZZ on page # 19 from –30 A and 5 A
DD
Test Conditions
to V
DD
IH
Description of Change
< V
to NC in the 165-Ball FBGA package in page 6
X
from Input Load Current to Input Leakage
DD
on page # 19
JC
from 3.3 to 2.28 C/W for 100
CY7C1471V33
CY7C1473V33
CY7C1475V33
Page 34 of 36
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