DSPIC33EP256MU810-I/PF Microchip Technology, DSPIC33EP256MU810-I/PF Datasheet - Page 288

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DSPIC33EP256MU810-I/PF

Manufacturer Part Number
DSPIC33EP256MU810-I/PF
Description
100 PINS, 256KB Flash, 28KB RAM, 60 MHz, USB, 2xCAN, 15 DMA 100 TQFP 14x14x1mm T
Manufacturer
Microchip Technology
Series
dsPIC™ 33EPr
Datasheet

Specifications of DSPIC33EP256MU810-I/PF

Processor Series
DSPIC33E
Core
dsPIC
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Core Processor
dsPIC
Core Size
16-Bit
Speed
60 MIPs
Connectivity
CAN, I²C, IrDA, LIN, QEI, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, Motor Control PWM, POR, PWM, WDT
Number Of I /o
83
Program Memory Size
256KB (85.5K x 24)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
12K x 16
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 32x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSPIC33EP256MU810-I/PF
Manufacturer:
Microchip Technology
Quantity:
10 000
Company:
Part Number:
DSPIC33EP256MU810-I/PF
Quantity:
540
dsPIC33EPXXXMU806/810/814 and PIC24EPXXXGU810/814
REGISTER 16-21: FCLCONx: PWM FAULT CURRENT-LIMIT CONTROL REGISTER
DS70616E-page 288
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14-10
bit 9
bit 8
Note 1:
IFLTMOD
R/W-0
R/W-0
2:
3:
These bits should be changed only when PTEN = 0. Changing the clock selection during operation will
yield unpredictable results.
When Independent Fault mode is enabled (IFLTMOD = 1), and Fault 1 is used for Fault mode
(FLTSRC<4:0> = 01000), the Current-Limit Control Source Select bits (CLSRC<4:0>) should be set to an
unused current-limit source to prevent the current-limit source from disabling both the PWMxH and
PWMxL outputs.
When Independent Fault mode is enabled (IFLTMOD = 1), and Fault 1 is used for Current-Limit mode
(CLSRC<4:0> = 01000), the Fault Control Source Select bits (FLTSRC<4:0>) should be set to an unused
Fault source to prevent Fault 1 from disabling both the PWMxL and PWMxH outputs.
IFLTMOD: Independent Fault Mode Enable bit
1 = Independent Fault mode: Current-limit input maps FLTDAT<1> to PWMxH output and Fault input
0 = Normal Fault mode: Current-Limit mode maps CLDAT<1:0> bits to the PWMxH and PWMxL
CLSRC<4:0>: Current-Limit Control Signal Source Select bits for PWM Generator #
These bits also specify the source for the dead-time compensation input signal, DTCMPx.
11111 = Reserved
01001 = Reserved
01010 = Comparator 3
01001 = Comparator 2
01000 = Comparator 1
00111 = Reserved
00110 = Fault 7
00101 = Fault 6
00100 = Fault 5
00011 = Fault 4
00010 = Fault 3
00001 = Fault 2
00000 = Fault 1
CLPOL: Current-Limit Polarity bit for PWM Generator #
1 = The selected current-limit source is active-low
0 = The selected current-limit source is active-high
CLMOD: Current-Limit Mode Enable bit for PWM Generator #
1 = Current-Limit mode is enabled
0 = Current-Limit mode is disabled
R/W-0
R/W-0
maps FLTDAT<0> to PWMxL output. The CLDAT<1:0> bits are not used for override functions.
outputs. The PWM Fault mode maps FLTDAT<1:0> to the PWMxH and PWMxL outputs.
FLTSRC<4:0>
W = Writable bit
‘1’ = Bit is set
R/W-0
R/W-0
(2,3)
CLSRC<4:0>
R/W-0
R/W-0
Preliminary
(2,3)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
R/W-0
(1)
FLTPOL
R/W-0
R/W-0
 2009-2011 Microchip Technology Inc.
(1)
x = Bit is unknown
CLPOL
R/W-0
R/W-0
FLTMOD<1:0>
(1)
(2,3)
CLMOD
R/W-0
R/W-0
bit 8
bit 0

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