DSPIC33EP256MU810-I/PF Microchip Technology, DSPIC33EP256MU810-I/PF Datasheet - Page 453

• Manufacturer Part Number: DSPIC33EP256MU810-I/PF
• Description: 100 PINS, 256KB Flash, 28KB RAM, 60 MHz, USB, 2xCAN, 15 DMA 100 TQFP 14x14x1mm T
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33EPr

Specifications of DSPIC33EP256MU810-I/PF

• Processor Series: DSPIC33E
• Core: dsPIC
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 60 MIPs
• Connectivity: CAN, I²C, IrDA, LIN, QEI, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 83
• Program Memory Size: 256KB (85.5K x 24)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 12K x 16
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 32x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP
• Lead Free Status / Rohs Status: Details

TABLE 30-2:
 2009-2011 Microchip Technology Inc.
Base
72
73
74
75
76
77
78
79
80
81
82
83
84
Note
Instr
#
dsPIC33EPXXXMU806/810/814 and PIC24EPXXXGU810/814
SL
SUB
SUBB
SUBR
SUBBR
SWAP
TBLRDH
TBLRDL
TBLWTH
TBLWTL
ULNK
XOR
ZE
Mnemonic
Assembly
1:
2:
This instruction is available in dsPIC33EPXXXMU806/810/814 devices only.
Read and Read-Modify-Write (e.g., bit operations and logical operations) on non-CPU SFRs incur an additional instruction cycle.
SL
SL
SL
SL
SL
SUB
SUB
SUB
SUB
SUB
SUB
SUBB
SUBB
SUBB
SUBB
SUBB
SUBR
SUBR
SUBR
SUBR
SUBBR
SUBBR
SUBBR
SUBBR
SWAP.b
SWAP
TBLRDH
TBLRDL
TBLWTH
TBLWTL
ULNK
XOR
XOR
XOR
XOR
XOR
ZE
INSTRUCTION SET OVERVIEW (CONTINUED)
f
f,WREG
Ws,Wd
Wb,Wns,Wnd
Wb,#lit5,Wnd
Acc
f
f,WREG
#lit10,Wn
Wb,Ws,Wd
Wb,#lit5,Wd
f
f,WREG
#lit10,Wn
Wb,Ws,Wd
Wb,#lit5,Wd
f
f,WREG
Wb,Ws,Wd
Wb,#lit5,Wd
f
f,WREG
Wb,Ws,Wd
Wb,#lit5,Wd
Wn
Wn
Ws,Wd
Ws,Wd
Ws,Wd
Ws,Wd
f
f,WREG
#lit10,Wn
Wb,Ws,Wd
Wb,#lit5,Wd
Ws,Wnd
(1)
Assembly Syntax
Preliminary
f = Left Shift f
WREG = Left Shift f
Wd = Left Shift Ws
Wnd = Left Shift Wb by Wns
Wnd = Left Shift Wb by lit5
Subtract Accumulators
f = f – WREG
WREG = f – WREG
Wn = Wn – lit10
Wd = Wb – Ws
Wd = Wb – lit5
f = f – WREG – (C)
WREG = f – WREG – (C)
Wn = Wn – lit10 – (C)
Wd = Wb – Ws – (C)
Wd = Wb – lit5 – (C)
f = WREG – f
WREG = WREG – f
Wd = Ws – Wb
Wd = lit5 – Wb
f = WREG – f – (C)
WREG = WREG – f – (C)
Wd = Ws – Wb – (C)
Wd = lit5 – Wb – (C)
Wn = nibble swap Wn
Wn = byte swap Wn
Read Prog<23:16> to Wd<7:0>
Read Prog<15:0> to Wd
Write Ws<7:0> to Prog<23:16>
Write Ws to Prog<15:0>
Unlink Frame Pointer
f = f .XOR. WREG
WREG = f .XOR. WREG
Wd = lit10 .XOR. Wd
Wd = Wb .XOR. Ws
Wd = Wb .XOR. lit5
Wnd = Zero-extend Ws
Description
Words
# of
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Cycles
# of
DS70616E-page 453
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
5
5
2
2
1
1
1
1
1
1
(2)
Status Flags
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
OA,OB,OAB,
SA,SB,SAB
C,N,OV,Z
C,N,OV,Z
C,N,OV,Z
Affected
C,Z,N
None
None
None
None
None
None
SFA
N,Z
N,Z
N,Z
N,Z
N,Z
N,Z
N,Z