KSZ8851-16MLLI Micrel Inc, KSZ8851-16MLLI Datasheet - Page 61

• Manufacturer Part Number: KSZ8851-16MLLI
• Description: 10/100BT Ethernet MAC + PHY With Generic (8, 16-bit) Bus Interface (I-Temp)
• Manufacturer: Micrel Inc

Specifications of KSZ8851-16MLLI

• Controller Type: Ethernet Controller, MAC/PHY
• Interface: Bus
• Voltage - Supply: 1.8V, 2.5V, 3.3V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-TQFP, 48-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 576-3505

Go-Sleep & Wake-Up Time Register (0xD6 – 0xD7): GSWUTR
This register contains the value which is used to control minimum Go-Sleep time period when the device from normal
power state to low power state or to control minimum Wake-Up time period when the device from low power state to
normal power state in energy detect mode.
PHY Reset Register (0xD8 – 0xD9): PHYRR
This register contains a control bit to reset PHY block when write an “1”.
0xDA – 0xDF: Reserved
0xE0 – 0xE3: Reserved
PHY 1 MII-Register Basic Control Register (0xE4 – 0xE5): P1MBCR
This register contains Media Independent Interface (MII) register for port 1 as defined in the IEEE 802.3 specification.
August 2009
Micrel, Inc.
Bit
Bit
15-8
7-0
Bit
15-1
0
Bit
15
14
13
12
11-10
9
Default
0
0
1
1
0
0
Default Value
-
0
Default
0x08
0x0C
Default
R/W
RW
WO
(Self clear)
R/W
RO
RW
RW
RW
RW
RW
R/W
R/W
RW
RW
Description
10: Soft Power Down Mode.
11: Power Saving Mode.
In energy detect mode under low power state, it can wake-up to normal operation mode
either from line or host wake-up (host CPU issues a read cycle to GRR register).
In soft power down mode, it can wake-up to normal operation mode only from host wake-
up (host CPU issues a read cycle to GRR register).
Description
Wake-up Time
This value is used to control the minimum period that the energy has to be detected
consecutively before the device is waked-up from the low power state. The unit is 16 ms
+/- 80%, the default wake-up time is 128 ms (16ms x 8). Zero time (0x00) is not allowed
Go-sleep Time
This value is used to control the minimum period that the no energy event has to be
detected consecutively before the device enters the low power state when the energy
detect mode is on. The unit is 1 sec +/-80%, the default go-sleep time is 12 sec (1s x 12).
Zero time (0x00) is not allowed
Description
Reserved.
PHY Reset Bit
This bit is write only and self clear after write an “1”, it is used to reset PHY block circuitry.
Description
Reserved
Local (far-end) loopback (llb)
1 = perform local loopback at host
(host Tx -> PHY -> host Rx, see Figure 10)
0 = normal operation
Force 100
1 = force 100Mbps if AN is disabled (bit 12)
0 = force 10Mbps if AN is disabled (bit 12)
AN Enable
1 = auto-negotiation enabled.
0 = auto-negotiation disabled.
Reserved
Restart AN
1 = restart auto-negotiation.
0 = normal operation.
61
Bit is same as:
Bit 6 in P1CR
Bit 7 in P1CR
Bit 13 in P1CR
KSZ8851-16MLL/MLLI
M9999-083109-2.0