KSZ8851-16MLLI Micrel Inc, KSZ8851-16MLLI Datasheet - Page 69

10/100BT Ethernet MAC + PHY With Generic (8, 16-bit) Bus Interface (I-Temp)

KSZ8851-16MLLI

Manufacturer Part Number
KSZ8851-16MLLI
Description
10/100BT Ethernet MAC + PHY With Generic (8, 16-bit) Bus Interface (I-Temp)
Manufacturer
Micrel Inc
Datasheets

Specifications of KSZ8851-16MLLI

Controller Type
Ethernet Controller, MAC/PHY
Interface
Bus
Voltage - Supply
1.8V, 2.5V, 3.3V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-TQFP, 48-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Supply
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
576-3505

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Example:
1. MIB Counter Read (read port 1 “Rx64Octets” counter at indirect address offset 0x0E)
Additional MIB Information
In the heaviest condition, the byte counter will overflow in 2 minutes. It is recommended that the software read all the
counters at least every 30 seconds.
MIB counters are designed as “read clear”. That is, these counters will be cleared after they are read.
August 2009
Micrel, Inc.
Offset
0x1C
0x1D
0x1E
0x1F
Counter Name
TxTotalCollision
TxExcessiveCollision
TxSingleCollision
TxMultipleCollision
Then
Write to reg. IACR (0xC8) with 0x1C0E (set indirect address and trigger a read MIB counters operation)
Read reg. IADHR (MIB counter value 31-16)
Read reg. IADLR (MIB counter value 15-0)
Table 13. Port 1 MIB Counters Indirect Memory Offsets
Description
Tx total collision, half duplex only
A count of frames for which Tx fails due to excessive collisions
Successfully Tx frames on a port for which Tx is inhibited by exactly one collision
Successfully Tx frames on a port for which Tx is inhibited by more than one collision
69
KSZ8851-16MLL/MLLI
M9999-083109-2.0

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