KSZ8995FQI Micrel Inc, KSZ8995FQI Datasheet - Page 35

5 Port 10/100 Switch With PHY And Frame Buffers ( )

KSZ8995FQI

Manufacturer Part Number
KSZ8995FQI
Description
5 Port 10/100 Switch With PHY And Frame Buffers ( )
Manufacturer
Micrel Inc
Datasheet

Specifications of KSZ8995FQI

Number Of Primary Switch Ports
5
Internal Memory Buffer Size
64
Operating Supply Voltage (typ)
1.8/2.5/3.3V
Fiber Support
Yes
Integrated Led Drivers
Yes
Phy/transceiver Interface
MII/SNI
Data Rate (typ)
10/100Mbps
Vlan Support
Yes
Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Pin Count
128
Mounting
Surface Mount
Jtag Support
No
Operating Temperature Classification
Industrial
Data Rate
100Mbps
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
576-3300

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
KSZ8995FQI
Manufacturer:
MICREL
Quantity:
20 000
Semptember 2008
Advanced VLAN features are also supported in KS8995MA/FQ, such as “VLAN ingress filtering” and “discard non
PVID” defined in Register 18 bit 6 and bit 5. These features can be controlled on a port basis.
Rate Limit Support
KS8995MA/FQ supports hardware rate limiting on “receive” and “transmit” independently on a per port basis. It also
supports rate limiting in a priority or non-priority environment. The rate limit starts from 0Kbps and goes up to the line
rate in steps of 32Kbps. The KS8995MA/FQ uses one second as an interval. At the beginning of each interval, the
counter is cleared to zero, and the rate limit mechanism starts to count the number of bytes during this interval.
For receive, if the number of bytes exceeds the programmed limit, the switch will stop receiving packets on the port
until the “one second” interval expires. There is an option provided for flow control to prevent packet loss. If the rate
limit is programmed greater than or equal to 128Kbps and the byte counter is 8K bytes below the limit, the flow
control will be triggered. If the rate limit is programmed lower than 128Kbps and the byte counter is 2K bytes below
the limit, the flow control will be triggered.
For transmit, if the number of bytes exceeds the programmed limit, the switch will stop transmitting packets on the
port until the “one second” interval expires.
If priority is enabled, the KS8995MA/FQ can support different rate controls for both high priority and low priority
packets. This can be programmed through Registers 21–27.
Dynamic MAC table
SA+FID found in
Yes
No
Action
The SA+FID will be learned into the dynamic table.
Time stamp will be updated.
Table 8. FID+SA Look-Up in the VLAN Mode
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M9999-091508

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