KSZ8995FQI Micrel Inc, KSZ8995FQI Datasheet - Page 41

5 Port 10/100 Switch With PHY And Frame Buffers ( )

KSZ8995FQI

Manufacturer Part Number
KSZ8995FQI
Description
5 Port 10/100 Switch With PHY And Frame Buffers ( )
Manufacturer
Micrel Inc
Datasheet

Specifications of KSZ8995FQI

Number Of Primary Switch Ports
5
Internal Memory Buffer Size
64
Operating Supply Voltage (typ)
1.8/2.5/3.3V
Fiber Support
Yes
Integrated Led Drivers
Yes
Phy/transceiver Interface
MII/SNI
Data Rate (typ)
10/100Mbps
Vlan Support
Yes
Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Pin Count
128
Mounting
Surface Mount
Jtag Support
No
Operating Temperature Classification
Industrial
Data Rate
100Mbps
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
576-3300

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
KSZ8995FQI
Manufacturer:
MICREL
Quantity:
20 000
Semptember 2008
SPIS_N
SPIS_N
MII Management Interface (MIIM)
A standard MIIM interface is provided for all five PHY devices in the KS8995MA/FQ. An external device with
MDC/MDIO capability is able to read PHY status or to configure PHY settings. The device is able to meet IEEE
specification of 2.5MHz MDC clock. For details on the MIIM interface standard please reference the IEEE 802.3
specification (section 22.2.4.5). The MIIM interface does not have access to all the configuration registers in the
KS8995MA/FQ. It can only access the standard MII registers. See “MIIM Registers.” The SPI interface, on the other
hand, can be used to access the entire KS8995MA/FQ feature set.
SPIS_N
SPIS_N
SPIC
SPID
SPIQ
SPIC
SPID
SPIQ
SPIQ
SPIQ
SPIC
SPID
SPIC
SPID
D7
X
X
D7
X
D6
X
0
D6
0
D5
X
0
D5
READ COMMAND
Byte 2
0
D4
0
X
D4
Byte 2
WRITE COMMAND
0
D3
0
X
D4
0
D2
X
0
D2
0
D1
X
0
D1
0
D0
X
1
D0
Figure 11. SPI Multiple Write
Figure 12. SPI Multiple Read
1
D7
1
X
D7
0
A7 A6 A5 A4 A3 A2 A1 A0
D6
X
D6
A7 A6 A5 A4 A3 A2 A1 A0
D5
X
D5
READ ADDRESS
Byte 3 ...
D4
X
Byte 3 ...
D4
WRITE ADDRESS
41
D3
X
D3
D2
X
D2
D1
X
D1
D0
X
D0
D7
X
D7
X
D7
D7
D6
X
D6
X
D6
D6
D5
X
D5
Byte 1
X
Byte N
D5
D5
D4
X
D4
X
D3
D4
D4
Byte N
X
Byte 1
D3
X
D2
D3
D3
X
D2
X
M9999-091508
D1
D2
D2
X
D1
X
D0
D1
D1
X
D0
X
D0
D0

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