ADAU1961WBCPZ Analog Devices Inc, ADAU1961WBCPZ Datasheet - Page 69

IC STEREO AUD CODEC LP 32LFCSP

ADAU1961WBCPZ

Manufacturer Part Number
ADAU1961WBCPZ
Description
IC STEREO AUD CODEC LP 32LFCSP
Manufacturer
Analog Devices Inc
Type
Audio Codecr
Datasheet

Specifications of ADAU1961WBCPZ

Data Interface
Serial
Resolution (bits)
24 b
Number Of Adcs / Dacs
2 / 2
Sigma Delta
No
S/n Ratio, Adcs / Dacs (db) Typ
99 / 101
Dynamic Range, Adcs / Dacs (db) Typ
99 / 101
Voltage - Supply, Analog
2.97 V ~ 3.63 V
Operating Temperature
-40°C ~ 105°C
Mounting Type
Surface Mount
Package / Case
32-VFQFN, CSP Exposed Pad
Audio Codec Type
Stereo
No. Of Adcs
2
No. Of Dacs
2
No. Of Input Channels
2
No. Of Output Channels
2
Adc / Dac Resolution
24bit
Adcs / Dacs Signal To Noise Ratio
101dB
Sampling Rate
96kSPS
No. Of
RoHS Compliant
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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R42: Jack Detect Pin Control, 16,433 (0x4031)
With IOVDD set to 3.3 V, the low and high drive strengths of the JACKDET/MICIN pin are approximately 2.0 mA and 4.0 mA, respectively.
The optional pull-up/pull-down resistors are nominally 250 kΩ. When enabled, these pull-up/pull-down resistors set the input signals to
a defined state when the signal source becomes three-state.
Bit 7
Table 67. Jack Detect Pin Control Register
Bits
5
[3:2]
R67: Dejitter Control, 16,438 (0x4036)
The dejitter control register allows the size of the dejitter window to be set, and also allows all dejitter circuits in the device to be activated or
bypassed. Dejitter circuits protect against duplicate samples or skipped samples due to jitter from the serial ports in slave mode. Disabling
and reenabling certain subsystems in the device—that is, the ADCs, serial ports, and DACs—during operation can cause the associated
dejitter circuits to fail. As a result, audio data fails to be output to the next subsystem in the device.
When the serial ports are in master mode, the dejitter circuit can be bypassed by setting the dejitter window to 0. When the serial ports
are in slave mode, the dejitter circuit can be reinitialized prior to outputting audio from the device, guaranteeing that audio is output
to the next subsystem in the device. Any time that audio must pass through the ADCs, serial port, or DACs, the dejitter circuit can be
bypassed and reset by setting the dejitter window size to 0. In this way, the dejitter circuit can be immediately reactivated, without a wait
period, by setting the dejitter window size to the default value of 3.
Bit 7
Table 68. Dejitter Control Register
Bits
[7:0]
Bit Name
JDSTR
JDP[1:0]
Bit Name
DEJIT[7:0]
Reserved
Bit 6
Bit 6
JACKDET/MICIN pin drive strength.
Description
0 = low (default).
1 = high.
JACKDET/MICIN pad pull-up/pull-down configuration.
Setting
00
01
10
11
Description
Dejitter window size.
Window Size
00000000
00000011
00000101
Bit 5
JDSTR
Bit 5
Bit 4
Reserved
Bit 4
Configuration
Pull-up
Reserved
None (default)
Pull-down
Core Clock Cycles
0
3 (default)
5
Rev. 0 | Page 69 of 76
DEJIT[7:0]
Bit 3
Bit 3
JDP[1:0]
Bit 2
Bit 2
Bit 1
Bit 1
Reserved
ADAU1961
Bit 0
Bit 0

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