ispPAC-CLK5304S-01TN48I Lattice, ispPAC-CLK5304S-01TN48I Datasheet - Page 16

• Manufacturer Part Number: ispPAC-CLK5304S-01TN48I
• Description: Clock Drivers & Distribution ISP 0 Delay Unv Fan- Out Buf-Sngl End I
• Manufacturer: Lattice
• Type: Zero Delay Programmable PLL Clock Generatorr

Specifications of ispPAC-CLK5304S-01TN48I

• Max Input Freq: 267 MHz
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 3 V
• Maximum Operating Temperature: + 85 C
• Package / Case: TQFP-48
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Lattice Semiconductor
Typical Performance Characteristics
100
1.2
1.0
0.8
0.6
0.4
0.2
80
60
40
20
80
60
40
20
0
0
0
150
0
0
V=16
V=16
Period Jitter vs. Input/Output Frequency
Phase Jitter vs. Input/Output Frequency
V=8
V=8
50
50
200
V=4
Input/Output Frequency (MHz)
Input/Output Frequency (MHz)
V=4
(Normalized to 400MHz)
100
100
V=2
I
250
CCD
V=2
f
VCO
150
150
vs. f
(MHz)
VCO
300
V=1
200
200
V=1
350
250
250
400
300
300
16
250
200
150
100
1.2
1.0
0.8
0.6
0.4
0.2
50
0
0
0
0
Adjacent Cycle Jitter vs. Input/Output Frequency
V=16
V=8
(LVCMOS 3.3V, Normalized to 266MHz)
ispClock5300S Family Data Sheet
50
50
V=4
Input/Output Frequency (MHz)
I
CCO
Output Frequency
100
100
vs. Output Frequency
V=2
150
150
200
200
(MHz)
V=1
250
250
300
300