ispPAC-CLK5304S-01TN48I Lattice, ispPAC-CLK5304S-01TN48I Datasheet - Page 18

• Manufacturer Part Number: ispPAC-CLK5304S-01TN48I
• Description: Clock Drivers & Distribution ISP 0 Delay Unv Fan- Out Buf-Sngl End I
• Manufacturer: Lattice
• Type: Zero Delay Programmable PLL Clock Generatorr

Specifications of ispPAC-CLK5304S-01TN48I

• Max Input Freq: 267 MHz
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 3 V
• Maximum Operating Temperature: + 85 C
• Package / Case: TQFP-48
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Lattice Semiconductor
Figure 12. PLL Loop Bandwidth vs. Feedback Divider Setting (Nominal)
VCO
The ispClock5300S provides an internal VCO which provides an output frequency ranging from 160MHz to
400MHz. The VCO is implemented using differential circuit design techniques which minimize the influence of
power supply noise on measured output jitter. The VCO is also used to generate output clock skew as a function of
the total VCO period. Using the VCO as the basis for controlling output skew allows for highly precise and consis-
tent skew generation, both from device-to-device, as well as channel-to-channel within the same device.
Output V Dividers
The ispClock5300S incorporates a set of three 5-bit programmable Power of 2 dividers which provide the ability to
synthesize output frequencies differing from that of the reference clock input.
Each one of the three V dividers can be independently programmed to provide division ratios ranging from 1 to 32
in Power of 2 steps (1, 2, 4, 8, 16, 32).
6.0
5.0
4.0
3.0
2.0
1.0
0.0
50
40
30
20
10
0
100
Input Frequency and Modulation Index (MI)
80 100 120 140 160 180 200 220 240 260
VCO Frequency and V-Divider
Dynamic Phase Offset vs.
200
Input Frequency (MHz)
VCO Frequency (MHz)
PLL Bandwidth vs.
(Standard Mode)
(Vdiv = 2)
300
Vdiv=1
MI = 0.50%
MI = 2.0%
400
MI = 1.0%
Vdiv=2
Vdiv=4
Vdiv=8
Vdiv=16
Vdiv=32
MI = 0.25%
500
18
6.0
5.0
4.0
3.0
2.0
1.0
0.0
60
50
40
30
20
10
0
100
40
Input Frequency and Modulation Index (MI)
(Spread Spectrum Compatible Mode)
ispClock5300S Family Data Sheet
200
VCO Frequency and V-Divider
60
Dynamic Phase Offset vs.
PLL Loop Bandwidth vs.
VCO Frequency (MHz)
Input Frequency (MHz)
300
80
(Vdiv = 4)
100
400
MI = 2.0%
MI = 1.0%
120
500
Vdiv=16
Vdiv=32
Vdiv=2
Vdiv=4
Vdiv=8
MI = 0.50%
MI = 0.25%
140
600