LAN9312-NU SMSC, LAN9312-NU Datasheet - Page 38

• Manufacturer Part Number: LAN9312-NU
• Description: Ethernet ICs Hi Per 2 Port 10/100 Ethernet Switch
• Manufacturer: SMSC
• Type: Two Port Managed Ethernet Switchr

Specifications of LAN9312-NU

• Ethernet Connection Type: 10 Base-T, 100 Base-TX
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Product: Ethernet Switches
• Number Of Transceivers: 1
• Standard Supported: 802.3, 802.3u
• Data Rate: 10 Mbps, 100 Mbps
• Supply Voltage (max): 3.3 V
• Supply Voltage (min): 0 V
• Supply Current (max): 185 mA, 295 mA
• Maximum Operating Temperature: + 70 C
• Package / Case: TQFP-100
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Revision 1.7 (06-29-10)
4.2.1.1
4.2.1.2
4.2.2
4.2.2.1
Power-On Reset (POR)
A power-on reset occurs whenever power is initially applied to the LAN9312, or if the power is removed
and reapplied to the LAN9312. This event resets all circuitry within the device. Configuration straps
are latched, and the EEPROM Loader is run as a result of this reset.
A POR reset typically takes approximately 23mS, plus additional time (91uS for I
Microwire) per byte of data loaded from the EEPROM via the EEPROM Loader. A full EEPROM load
(64KB for I
80mS for Microwire EEPROM.
nRST Pin Reset
Driving the nRST input pin low initiates a chip-level reset. This event resets all circuitry within the
device. Use of this reset input is optional, but when used, it must be driven for the period of time
specified in
are latched, and the EEPROM Loader is run as a result of this reset.
A nRST pin reset typically takes approximately 760uS, plus additional time (91uS for I
Microwire) per byte of data loaded from the EEPROM via the EEPROM Loader. A full EEPROM load
(64KB for I
58mS for Microwire EEPROM.
Note: The nRST pin is pulled-high internally. If unused, this signal can be left unconnected. Do not
Please refer to
Multi-Module Resets
Multi-module resets activate multiple internal resets, but do not reset the entire chip. Configuration
straps are not latched upon multi-module resets. A multi-module reset is initiated by assertion of the
following:
Chip-level reset completion/configuration can be determined by polling the READY bit of the
Configuration Register (HW_CFG)
When set, the READY bit indicates that the reset has completed and the device is ready to be
accessed.
With the exception of the
Register
(RESET_CTL), read access to any internal resources is forbidden while the READY bit is cleared.
Writes to any address are invalid until the READY bit is set.
Note: The digital reset and soft reset do not reset register bits designated as NASR.
Note: The LAN9312 must be read at least once after a multi-module reset to ensure that write
Digital Reset (DIGITAL_RST)
A digital reset is performed by setting the DIGITAL_RST bit of the
(RESET_CTL). A digital reset will reset all LAN9312 sub-modules except the Ethernet PHYs (Port 1
PHY, Port 2 PHY, and Virtual PHY). The EEPROM Loader will automatically run following this reset.
Configuration straps are not latched as a result of a digital reset.
A digital reset typically takes approximately 760uS, plus additional time (91uS for I
Microwire) per byte of data loaded from the EEPROM via the EEPROM Loader. A full EEPROM load
Digital Reset (DIGITAL_RST)
Soft Reset (SRST)
rely on internal pull-up resistors to drive signals external to the device.
operations function properly.
(PMT_CTRL),
2
2
Section 15.5.2, "Reset and Configuration Strap Timing," on page
C, 2KB for Microwire) will complete in approximately 6.0 seconds for I
C, 2KB for Microwire) will complete in approximately 6.0 seconds for I
Section Table 3.7, "Miscellaneous Pins," on page 34
Byte Order Test Register
Hardware Configuration Register
High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface
or
DATASHEET
Power Management Control Register (PMT_CTRL)
38
(BYTE_TEST), and
(HW_CFG),
for a description of the nRST pin.
Power Management Control
Reset Control Register
Reset Control Register
443. Configuration straps
2
2
C EEPROM, and
C EEPROM, and
SMSC LAN9312
2
2
2
C, 28uS for
until it is set.
C, 28uS for
C, 28uS for
Hardware
Datasheet