LAN91C96TQFP SMSC, LAN91C96TQFP Datasheet - Page 3
![Ethernet ICs Non-PCI 10 Mbps Ethernet MAC](/photos/27/13/271359/lan9116_sml.jpg)
LAN91C96TQFP
Manufacturer Part Number
LAN91C96TQFP
Description
Ethernet ICs Non-PCI 10 Mbps Ethernet MAC
Manufacturer
SMSC
Type
Single Chip MAC and PHY Controllerr
Datasheet
1.LAN91C96-MU.pdf
(125 pages)
Specifications of LAN91C96TQFP
Ethernet Connection Type
10 Base-T, 100 Base-TX
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Product
Ethernet Controllers
Number Of Transceivers
1
Standard Supported
802.3, 802.3u
Data Rate
10 Mbps, 100 Mbps
Supply Voltage (max)
5 V
Supply Voltage (min)
0 V
Supply Current (max)
95 mA
Maximum Operating Temperature
+ 70 C
Package / Case
TQFP-100
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Non-PCI Single-Chip Full Duplex Ethernet Controller with Magic Packet
Datasheet
Table of Contents
CHAPTER 1 GENERAL DESCRIPTION ..................................................................... 7
CHAPTER 2 OVERVIEW ............................................................................................. 8
CHAPTER 3 PIN CONFIGURATIONS....................................................................... 11
3.1
CHAPTER 4 DESCRIPTION OF PIN FUNCTIONS ................................................... 17
4.1
CHAPTER 5 FUNCTIONAL DESCRIPTION .............................................................. 23
5.1
5.2
5.3
5.4
5.5
5.6
CHAPTER 6 FRAME FORMAT IN BUFFER MEMORY FOR ETHERNET ............... 38
CHAPTER 7 REGISTERS MAP IN I/O SPACE ......................................................... 42
7.1
7.2
CHAPTER 8 THEORY OF OPERATION ................................................................... 65
8.1
8.2
8.3
CHAPTER 9 FUNCTIONAL DESCRIPTION OF THE BLOCKS................................ 79
SMSC LAN91C96 5v&3v
Local Bus vs. PCMCIA vs. 68000 Pin Requirements...................................................................................15
Buffer Symbols................................................................................................................................................21
Buffer Memory................................................................................................................................................24
Interrupt Structure.........................................................................................................................................31
Reset Logic.......................................................................................................................................................32
Power Down Logic States...............................................................................................................................32
LAN91C96 Power Down States .....................................................................................................................33
PCMCIA CONFIGURATION REGISTERS DESCRIPTION ..................................................................36
I/O Space Access .............................................................................................................................................42
I/O Space Registers Description ....................................................................................................................42
Typical Flow of Events for Transmit (Auto Release = 0) ............................................................................67
Typical Flow of Events for Transmit (Auto Release = 1) ............................................................................68
Flow of Events for Receive .............................................................................................................................69
DATASHEET
Page 3
Revision 1.0 (10-24-08)