LAN91C96TQFP SMSC, LAN91C96TQFP Datasheet - Page 31
![Ethernet ICs Non-PCI 10 Mbps Ethernet MAC](/photos/27/13/271359/lan9116_sml.jpg)
LAN91C96TQFP
Manufacturer Part Number
LAN91C96TQFP
Description
Ethernet ICs Non-PCI 10 Mbps Ethernet MAC
Manufacturer
SMSC
Type
Single Chip MAC and PHY Controllerr
Datasheet
1.LAN91C96-MU.pdf
(125 pages)
Specifications of LAN91C96TQFP
Ethernet Connection Type
10 Base-T, 100 Base-TX
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Product
Ethernet Controllers
Number Of Transceivers
1
Standard Supported
802.3, 802.3u
Data Rate
10 Mbps, 100 Mbps
Supply Voltage (max)
5 V
Supply Voltage (min)
0 V
Supply Current (max)
95 mA
Maximum Operating Temperature
+ 70 C
Package / Case
TQFP-100
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Non-PCI Single-Chip Full Duplex Ethernet Controller with Magic Packet
Datasheet
5.2
SMSC LAN91C96 5v&3v
8 BIT MODE
((IOis8=1) +
(nEN16=1).
(16BIT=0))
16 BIT MODE
otherwise
16BIT:
IOis8:
nEN16:
8 Bit mode:
Interrupt Structure
The Ethernet interrupt is conceptually equivalent to the LAN91C94 interrupt line, it is the or function of all
enabled interrupts within the Ethernet core. The enabling, reporting, and clearing of these sources is
controlled by the ECOR register. The interrupt structure is similar for LOCAL BUS and PCMCIA modes
with the following exceptions:
PCMCIA uses a single interrupt pin (nIREQ) while LOCAL BUS can use any of four INTR0-3 pins.
8 BIT MODE
16 BIT MODE
(A0=0).(nSBHE=0)
CONFIGURATION REGISTER bit 7
CSR register bit 5
pin nEN16
((IOis8 = 1) + (nMIS16 = 1)
A0
X
X
X
0
1
0
0
1
Table 5.3 - Bus Transactions In PCMCIA Mode
Table 5.4 - Bus Transactions In 68000 Mode
NCE1
0
0
1
0
0
0
1
1
DATASHEET
NCE2
Page 31
Even byte
X
X
X
0
1
1
0
1
D0-7
ILLEGAL ACCESS
Even byte
Even byte
Even byte
Odd byte
Odd byte
D0-7
-
Odd byte
NO CYCLE
NO CYCLE
D8-15
Odd byte
Odd byte
D8-15
-
-
-
Revision 1.0 (10-24-08)
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