MT48H8M32LFB5-75 IT:H Micron Technology Inc, MT48H8M32LFB5-75 IT:H Datasheet - Page 42

• Manufacturer Part Number: MT48H8M32LFB5-75 IT:H
• Description: DRAM Chip Mobile SDRAM 256M-Bit 8Mx32 1.8V 90-Pin VFBGA Tray
• Manufacturer: Micron Technology Inc
• Type: Mobile SDRAMr

Specifications of MT48H8M32LFB5-75 IT:H

• Density: 256 Mb
• Maximum Clock Rate: 133 MHz
• Package: 90VFBGA
• Address Bus Width: 14 Bit
• Operating Supply Voltage: 1.8 V
• Maximum Random Access Time: 8|6 ns
• Operating Temperature: -40 to 85 °C
• Format - Memory: RAM
• Memory Type: Mobile SDRAM
• Memory Size: 256M (8Mx32)
• Speed: 133MHz
• Interface: Parallel
• Voltage - Supply: 1.7 V ~ 1.95 V
• Package / Case: 90-VFBGA
• Organization: 8Mx32
• Address Bus: 14b
• Access Time (max): 8/6ns
• Operating Supply Voltage (typ): 1.8V
• Package Type: VFBGA
• Operating Temp Range: -40C to 85C
• Operating Supply Voltage (max): 1.95V
• Operating Supply Voltage (min): 1.7V
• Supply Current: 100mA
• Pin Count: 90
• Mounting: Surface Mount
• Operating Temperature Classification: Industrial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PDF:09005aef8219eeeb/Source: 09005aef8219eedd
256mb_x16_sdram_y36m_1.fm - Rev G 6/09 EN
10. READs or WRITEs listed in the Command (Action) column include READs or WRITEs with
11. Does not affect the state of the bank and acts as a NOP to that bank.
5. The following states must not be interrupted by any executable command; DESELECT or
6. All states and sequences not shown are illegal or reserved
7. Not bank-specific; requires that all banks are idle.
8. May or may not be bank-specific; if all banks are to be precharged, all must be in a valid
9. Not bank-specific; BURST TERMINATE affects the most recent READ or WRITE burst,
Refreshing:
Accessing mode
register:
Precharging all:
NOP commands must be applied on each positive clock edge during these states.
state for precharging.
regardless of bank.
auto precharge enabled and READs or WRITEs with auto precharge disabled.
Starts with registration of a PRECHARGE ALL command and ends
Starts with registration of an AUTO REFRESH command and ends
when
all banks idle state.
Starts with registration of an LMR command and ends when
has been met. Once
all banks idle state.
when
42
t
t
RFC is met. Once
RP is met. Once
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t
MRD is met, the Mobile SDRAM will be in the
t
RP is met, all banks will be in the idle state.
t
256Mb: x16, x32 Mobile SDRAM
RFC is met, the Mobile SDRAM will be in the
©2006 Micron Technology, Inc. All rights reserved.
Truth Tables
t
MRD