72T1875L5BBI Integrated Device Technology (Idt), 72T1875L5BBI Datasheet - Page 35

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72T1875L5BBI

Manufacturer Part Number
72T1875L5BBI
Description
FIFO Mem Async/Sync Dual Depth/Width Uni-Dir 16K x 18/32K x 9 144-Pin BGA
Manufacturer
Integrated Device Technology (Idt)
Datasheet

Specifications of 72T1875L5BBI

Package
144BGA
Configuration
Dual
Bus Directional
Uni-Directional
Density
288 Kb
Organization
16Kx18|32Kx9
Data Bus Width
9/18 Bit
Timing Type
Asynchronous|Synchronous
Expansion Type
Depth|Width
Typical Operating Supply Voltage
2.5 V
Operating Temperature
-40 to 85 °C
NOTE:
1. During Partial Reset the High-Impedance control of the Qn data outputs is provided by OE only, RCS can be HIGH or LOW until the first rising edge of RCLK after Master Reset
IDT72T1845/55/65/75/85/95/105/115/125 2.5V TeraSync™ 18-BIT/9-BIT FIFO
8Kx9, 8Kx18/16Kx9, 16Kx18/32Kx9, 32Kx18/64Kx9, 64Kx18/128Kx9, 128Kx18/256Kx9, 256Kx18/512Kx9, 512Kx18/1Mx9
is complete.
PAF, HF
Q
EF/OR
FF/IR
WEN
0
REN
PRS
SEN
PAE
- Q
RT
n
t
t
t
t
RSS
RSS
RSS
RSS
t
t
t
RSF
t
t
RSF
RSF
RSF
RSF
Figure 10. Partial Reset Timing
t
RS
35
2Kx18/4Kx9, 4Kx18/
If FWFT = LOW, FF = HIGH
If FWFT = HIGH, IR = LOW
If FWFT = HIGH, OR = HIGH
If FWFT = LOW, EF = LOW
t
t
RSR
RSR
OE = HIGH
OE = LOW
COMMERCIAL AND INDUSTRIAL
TEMPERATURE RANGES
FEBRUARY 10, 2009
5909 drw14

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