N25Q128A13BF840E NUMONYX, N25Q128A13BF840E Datasheet - Page 91

• Manufacturer Part Number: N25Q128A13BF840E
• Description: 128MBQUAD IO,XIP VDFPN 8X6 3VT&R
• Manufacturer: NUMONYX

9.1.12
S
C
DQ0
S
C
DQ0
MSB
7
40
Figure 20. Page Program instruction sequence
Dual Input Fast Program (DIFP)
The Dual Input Fast Program (DIFP) instruction is very similar to the Page Program (PP)
instruction, except that the data are entered on two pins (pin DQ0 and pin DQ1) instead of
only one. Inputting the data on two pins instead of one doubles the data transfer bandwidth
compared to the Page Program (PP) instruction.
The Dual Input Fast Program (DIFP) instruction is entered by driving Chip Select (S) Low,
followed by the instruction code, three address bytes and at least one data byte on Serial
Data input (DQ0).
If the 8 least significant address bits (A7-A0) are not all zero, all transmitted data that goes
beyond the end of the current page are programmed from the start address of the same
page (from the address whose 8 least significant bits (A7-A0) are all zero). Chip Select (S)
must be driven Low for the entire duration of the sequence.
If more than 256 bytes are sent to the device, previously latched data are discarded and the
last 256 data bytes are guaranteed to be programmed correctly within the same page. If less
than 256 data bytes are sent to device, they are correctly programmed at the requested
addresses without having any effects on the other bytes in the same page.
For optimized timings, it is recommended to use the Dual Input Fast Program (DIFP)
instruction to program all consecutive targeted bytes in a single sequence rather to using
6
41
0
5
42
Data byte 2
1
4
43 44 45 46 47 48 49 50
2
Instruction
3
3
2
4
1
5
0
6
MSB
7
7
MSB
6
23
8
5
22 21
Data byte 3
9 10
24-bit address
4
51
3
52 53 54 55
2
3
28 29 30 31 32 33 34 35
1
2
(1)
0
1
0
MSB
MSB
7
7
6
6
Data byte 256
5
5
Data byte 1
4
4
3
3
36 37 38
2
2
1
1
0
0
39
AI13739b
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