XC5VLX220-1FF1760I Xilinx Inc, XC5VLX220-1FF1760I Datasheet - Page 284

• Manufacturer Part Number: XC5VLX220-1FF1760I
• Description: FPGA Virtex®-5 Family 221184 Cells 65nm (CMOS) Technology 1V 1760-Pin FCBGA
• Manufacturer: Xilinx Inc
• Series: Virtex™-5 LXr

Specifications of XC5VLX220-1FF1760I

• Package: 1760FCBGA
• Family Name: Virtex®-5
• Device Logic Units: 221184
• Typical Operating Supply Voltage: 1 V
• Maximum Number Of User I/os: 800
• Ram Bits: 7077888
• Number Of Logic Elements/cells: 221184
• Number Of Labs/clbs: 17280
• Total Ram Bits: 7077888
• Number Of I /o: 800
• Voltage - Supply: 0.95 V ~ 1.05 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 1760-BBGA, FCBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With: HW-AFX-FF1760-500-G - BOARD DEV VIRTEX 5 FF1760
• Number Of Gates: -
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Chapter 6: SelectIO Resources
X-Ref Target - Figure 6-76
284
DCI
SSTL2_II_T_DCI (2.5V) Split-Thevenin Termination
SSTL2_II_T_DCI
R 0 = 25
Ω
Figure 6-76: SSTL2_II_T_DCI (2.5V) Split-Thevenin Termination
Figure 6-76
SSTL2_II_T_DCI (2.5V) with on-chip split-Thevenin termination. In this bidirectional I/O
standard, when 3-stated, the termination is invoked on the receiver and not on the driver.
V
Not 3-stated
REF
= 1.25V
IOB
shows a sample circuit illustrating a valid termination technique for
Z 0
www.xilinx.com
3-stated
IOB
V
CCO
2R
2R
= 2.5V
VRP
VRN
= 2Z 0 = 100Ω
= 2Z 0 = 100Ω
V
REF
= 1.25V
Virtex-5 FPGA User Guide
UG190 (v5.3) May 17, 2010
SSTL2_II_T_DCI
ug190_6_92_041206
R 0 = 25
+
–
Ω