STLC5466 STMicroelectronics, STLC5466 Datasheet - Page 38
STLC5466
Manufacturer Part Number
STLC5466
Description
RF Wireless Misc Multi-HDLC Sw Matrix
Manufacturer
STMicroelectronics
Type
Telecom ICr
Specifications of STLC5466
Operating Temperature Range
- 40 C to + 85 C
Package / Case
LQFP-176
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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STLC5466
CONTROL REGISTER (CTLR) defines each Output Time Slot OTSy of each Output Time Division Multi-
plex OTDMq:
SI
LOOP: LOOPBACK per channel relevant if two connections has been established (bidirectional or not).
OTSV : OUTPUT TIME SLOT VALIDATED
S1/S0 : Source
38/130
: SEQUENCE INTEGRITY
SI = 1, the delay is always: (31 - ITSx) + 32 + OTSy (constant delay).
SI = 0, the delay is minimum to pass through the data memory (variable delay).
LOOP = 1, OTSy, OTDMq is taken into account instead of ITSy, ITDMq.
OTSV = 1, transparent Mode LOOPBACK.
OTSV = 0, not Transparent Mode LOOPBACK.
OTSV = 1, OTSy OTDMq is enabled.
OTSV = 0, OTSy OTDMq is High impedance.
(OTSy: Output Time slot with 0
Note:
• Connection
When the source of D channels is selected (GCI channels defined by ITS 1/0) and when the
destination is selected (Output timeslot defined by OTS 0/4; output TDM defined by OM 0/2) the
upstream connection is set up; the downstream connection (reverse direction TDM to GCI) is
set up automatically if ITS 2 bit is at 1. So BID, bit of CMAR must be written at”0”.
• Release
Remember: write S1=1, S0=0 and ITS 2 bit = 0 to release the downstream connection; the up-
stream connection is released when the source changes.
S1
0
0
1
1
S0
0
1
0
1
D channels from/to GCI multiplexes (See note and table hereafter)
Pseudo Random Sequence Generator delivers sequences.
y
Hyperchannel at n x 64 Kb/s is possible.
Source for each timeslot of DOUT0/7
31; OTDMq: Output Time Division Multiplex with 0 q
Data Memory (Normal case)
Connection Memory
7).
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