STLC5466 STMicroelectronics, STLC5466 Datasheet - Page 60

• Manufacturer Part Number: STLC5466
• Description: RF Wireless Misc Multi-HDLC Sw Matrix
• Manufacturer: STMicroelectronics
• Type: Telecom ICr

Specifications of STLC5466

• Operating Temperature Range: - 40 C to + 85 C
• Package / Case: LQFP-176
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

STLC5466
VI.33 - General Configuration Register 2
MC0/1 :
NINIT : NOT INIT
BYP
D6
60/130
bit15
Nu
: BYPASS
: HDLC2 connected to MATRIX
Nu
MC0/1: these two bits take into account the signal applied on MCLK pin. So whatever the fre-
quency may be, the internal circuit operates with the appropriate internal clock and the exchang-
es between Multi-HDLC and SDRAM are at the Master Clock frequency.
The duration of the pulse named token ring is equal to the period of master clock applied
to MCLK pin.
NINIT=1; when the microprocessor writes the SDRAM register with NINIT=1, the SDRAM will
not be initialized.
NINIT=0; when the microprocessor writes the SDRAMR register with NINIT=0, the SDRAM will
be initialized in accordance with LT0/2 bits (of SDRAMR).
In case of several Multi-HDLC’s connected to the same memory, only one of them initializes and
refreshes the SDRAM.
So the GCR2 registers of these Multi-HDLC’s are same contents except this bit which initializes
the SDRAM.
BYPASS=1; the write FIFO and the read fetch memory located in the microprocessor interface
are bypassed.
BYPASS=0; the write FIFO and the read fetch memory located in the microprocessor interface
are used when the microprocessor accesses the shared memory.
D6=1, the transmit HDLC2 is connected to matrix input 6, the DIN6 signal is ignored.
Master Clock0/1
MC1
0
0
1
1
Nu
MC0
Nu
0
1
0
1
Nu
Signal applied on MCLK pin
Nu
After reset (0000)
Nu
Not used
66MHz
50MHz
33MHz
bit8
Nu
bit7
Nu
H
id 512ms
SWAP
Exchanges between Multi-HDLC and
D6
SDRAM with common clock at
BYP NINIT
Not used
66MHz
50MHz
33MHz
0
GCR2 (42)
MC1
MC0
bit0
H