PSB50505EV13GXT Lantiq, PSB50505EV13GXT Datasheet - Page 128
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PSB50505EV13GXT
Manufacturer Part Number
PSB50505EV13GXT
Description
Manufacturer
Lantiq
Datasheet
1.PSB50505EV13GXT.pdf
(290 pages)
Specifications of PSB50505EV13GXT
Lead Free Status / RoHS Status
Supplier Unconfirmed
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x43_scram
bling
channel_
mode
ref_slot
Note: RAM slot 1 has always to be configured always as reference slot.
Note: To allow IWE8 internal initialization, all channels must remain in inactive mode for
6.1.2.2
Read/write Address 00400
Reset value: Not applicable. RAM must be reset and initialized via SW.
Data Sheet
31
23
15
7
at least 250 s after activation of the port (i.e. setting pcfN[p_tx_act] = 1). During
this time the device connected to the Framer Transmit Interface has to be in
normal operation.
RAM2: ATM Transmit Continuation Slot
ATM cell payload scrambling enable
0 =
1 =
Channel mode
00 =
01 =
10 =
11 =
Reference slot indicator
1 =
Not used
Disabled
Enabled
Inactive mode
Active mode (normal mode)
Standby mode
Active mode (normal mode)
This slot is a reference slot
H
to 005FF
Not used
Not used
Not used
H
128
scram-bli
PXB 4219E, PXB 4220E, PXB 4221E
x43_
ng
channel_mode[1:0]
Memory Structure
IWE8, V3.4
2003-01-20
ref_slot
= 1
24
16
8
0
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