PSB50505EV13GXT Lantiq, PSB50505EV13GXT Datasheet - Page 96
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PSB50505EV13GXT
Manufacturer Part Number
PSB50505EV13GXT
Description
Manufacturer
Lantiq
Datasheet
1.PSB50505EV13GXT.pdf
(290 pages)
Specifications of PSB50505EV13GXT
Lead Free Status / RoHS Status
Supplier Unconfirmed
- Current page: 96 of 290
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FRMFB[7:0]
FRFRS[7:0]
FRLOS[7:0]
FTCKO[7:0]
FTDAT[7:0]
FTMFS[7:0]
Data Sheet
1 =
Framer Receive Multiframe Begin
Depending on bits p_ces in pcfN:
Depending on bit “rfpp” in “opmo”:
FRMFB is always sampled with the falling edge of FRCLK.
Framer Receive Frame Synchronization Pulse
Permanently inactive
Framer Receive Loss of Signalling
Framer Transmit Clock
depending on bits ftckn in ftcs:
00 =
01 =
10 =
11 =
Framer Transmit Data
depending on bit “ftri” in “opmo”:
0 =
1 =
Framer Transmit Multiframe Synchronization
Depending on bit p_ces in pcfN:
0 =
0 =
1 =
0 =
1 =
FRDAT is sampled with the rising edge of FRCLK
Structured CES: A pulse on this pin designates the
first frame of a new multiframe
Unstructured CES: Unused, no constant level
allowed
FRMFB is active low
FRMFB is active high
depending on bit “rts_eval” in “opmo”:
0 = Transmit clock input with 1.544 MHz
1 = Clock of ICRC is used as transmit clock and is
also switched to FTCKO pins (FTCKO is output
pin)
FRCLK
Clock derived from RFCLK
No clock
FTDAT is clocked with the falling edge of FTCKO
FTDAT is clocked with the rising edge of FTCKO
Structured CES: Depending on “p_tx_mfs” in
“pcfN”:
0 = Superframe frame mode: FTMFS is asserted
every 12 frames (1.5 ms)
1 = Extended superframe mode: FTMFS is
asserted every 24 frames (3 ms)
96
PXB 4219E, PXB 4220E, PXB 4221E
Interface Description
IWE8, V3.4
2003-01-20
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