PSB50505EV13GXT Lantiq, PSB50505EV13GXT Datasheet - Page 141
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PSB50505EV13GXT
Manufacturer Part Number
PSB50505EV13GXT
Description
Manufacturer
Lantiq
Datasheet
1.PSB50505EV13GXT.pdf
(290 pages)
Specifications of PSB50505EV13GXT
Lead Free Status / RoHS Status
Supplier Unconfirmed
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RMADR
MPADR
The format of the counter threshold entries is as follows:
thres_act
thres_value
6.2.3
Read/write Address 24000
Reset value: Not applicable. RAM must be reset and initialized via SW
Memory size: 4K
RMADR
MPADR
Data Sheet
thres_act
31
23
15
7
17 16 15 14 13 12 11 10 9
17 16 15 14 13 12 11 10 9
Interrupt Queue
1
1
threshold active
0 =
1 =
threshold value
Thresholds beyond 4000 0000
entry as the counter stops at this value
15 14 13 12 11 10
15 14 13 12 11 10
0
0
32 bits
0
0
Disabled
Enabled
0
1
H
1
0
to 25FFF
thres_value[23:16]
port_nr
thres_value[15:8]
thres_value[7:0]
[2:0]
H
thres_value[30:24]
9
9
141
interrupt_queue_addr[11:0]
PXB 4219E, PXB 4220E, PXB 4221E
H
8
8
will never create an interrupt queue
channel_nr
7
8
7
8
[4:0]
6
7
6
7
5
6
5
6
4
5
4
5
3
4
3
4
Memory Structure
counter_nr
2
3
2
3
[3:0]
IWE8, V3.4
1
2
1
2
2003-01-20
0
1
0
1
24
16
8
0
0
0
0
0
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