PSB50505EV13GXT Lantiq, PSB50505EV13GXT Datasheet - Page 40
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PSB50505EV13GXT
Manufacturer Part Number
PSB50505EV13GXT
Description
Manufacturer
Lantiq
Datasheet
1.PSB50505EV13GXT.pdf
(290 pages)
Specifications of PSB50505EV13GXT
Lead Free Status / RoHS Status
Supplier Unconfirmed
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Table 11
Block
OT
FT
SL
OM
EQ
MP
RM
Data Sheet
Functions
Octet Transmit processing
ATM ports:
• Reading octets from ATM Transmit Buffer
• Cell rate de coupling: idle/unassigned cell insertion
• Cell payload scrambling
• HEC generation
AAL ports:
• Read octets from Reassembly Buffer
• Handling of Reassembly Buffer Overflow
• Handling of Reassembly Buffer underflow
• Reassembly Buffer initialization to compensate CDV
• Synchronization of AAL1 start of structure with synchronization pulse of
• Statistics counter event generation
Framer Transmit interfaces
• FTCKO synchronization
• 8 bit parallel to serial conversion
• Generation of frame and multiframe synchronization signals
• Timeslot counter
• Timeslot assignment and channel configuration (RAM2, RAM3, RAM4)
Serial Loop
• Serial loopback from Framer Transmit to Framer Receive
OAM processing
• Processing of OAM counter events
• Interrupt queue control
• Microprocessor access control to external RAM
Event Queue
• FIFO of 256 OAM counter events
Microprocessor interface
• Synchronization of asynchronous microprocessor interface signals
• Internal registers
• Interrupt generation
External RAM interface
• Generation of external RAM interface signals
• Generation of basic RAM cycle
• Access control to external RAM for different blocks
• Parity generation and checking
Functions of IWE8 Blocks (cont’d)
framer port
40
PXB 4219E, PXB 4220E, PXB 4221E
Functional Description
IWE8, V3.4
2003-01-20
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