LAN9220-ABZJ Standard Microsystems (SMSC), LAN9220-ABZJ Datasheet - Page 109
LAN9220-ABZJ
Manufacturer Part Number
LAN9220-ABZJ
Description
10/100 NON-PCI ETHERNET CONTROLLER
Manufacturer
Standard Microsystems (SMSC)
Datasheet
1.LAN9220-ABZJ.pdf
(151 pages)
Specifications of LAN9220-ABZJ
Operating Supply Voltage (typ)
1.8/3.3V
Operating Supply Voltage (max)
3.6V
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
56
Lead Free Status / RoHS Status
Compliant
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16-bit Non-PCI Small Form Factor 10/100 Ethernet Controller with Variable Voltage I/O & HP Auto-MDIX Support
Datasheet
SMSC LAN9220
5.4.2
31-16
BITS
15-0
Reserved
Physical Address [47:32]. This field contains the upper 16-bits (47:32) of the Physical Address of
the LAN9220 device. The content of this field is undefined until loaded from the EEPROM at power-
on. The host can update the contents of this field after the initialization process has completed.
ADDRH—MAC Address High Register
The MAC Address High register contains the upper 16-bits of the physical address of the MAC. The
contents of this register are optionally loaded from the EEPROM at power-on through the EEPROM
Controller if a programmed EEPROM is detected. The least significant byte of this register (bits [7:0])
is loaded from address 0x05 of the EEPROM. The second byte (bits [15:8]) is loaded from address
0x06 of the EEPROM. Please refer to
details the byte ordering of the ADDRL and ADDRH registers with respect to the reception of the
Ethernet physical address.
Offset:
Default Value:
2
0000FFFFh
DATASHEET
Section 4.6
109
DESCRIPTION
Attribute:
Size:
for more information on the EEPROM. Section
R/W
32 bits
Revision 2.7 (03-15-10)
5.4.3
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