L80223/D LSI, L80223/D Datasheet - Page 60

• Manufacturer Part Number: L80223/D
• Manufacturer: LSI

Specifications of L80223/D

• Lead Free Status / RoHS Status: Not Compliant

3.3 Management Interface (MI)/LED Signals
3-4
TX_CLK
TXD[3:0]
TX_EN
TX_ER
MDC
MDA4n
MDIO
PLED3n/MDA3n
Signal Descriptions
Transmit Clock Output
Transmit data from the controller on TXD, TX_EN, and
TX_ER is clocked in on the rising edge of TX_CLK and
OSCIN.
Transmit Data Input
TXD[3:0] contain input nibble data to be transmitted on
the TP outputs, and they are clocked in on the rising
edge of TX_CLK and OSCIN when TX_EN is asserted.
Transmit Enable Input
TX_EN must be asserted HIGH to indicate that data on
TXD and TX_ER is valid. TX_ER is clocked in on the ris-
ing edge of TX_CLK and OSCIN.
Transmit Error Input
The TXER pin, when asserted, causes a special pattern
to be transmitted on the twisted-pair outputs in place of
normal data, and it is clocked in on the rising edge of
TX_CLK when TX_EN is asserted.
MI Clock
The MDC clock shifts serial data for the internal registers
into and out of the MDIO pin on its rising edge.
Address 4 Input
During powerup or reset, this pin is high-impedance and
the level on this pin is latched in as the physical device
address MDA4 for the MI serial port
MI Data
This bidirectional pin contains serial data for the internal
registers. The data on this pin is clocked in and out of the
device on the rising edge of MDC.
Programmable LED Output/MI Address Bit
The default function of this pin is to be a 100 Mbits/s Link
Detect output. This pin can also be programmed through
the MI serial port to indicate other events or be user con-
trolled. This pin can drive an LED from V
Copyright © 2000, 2001, 2002 by LSI Logic Corporation. All rights reserved.
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