MC33989PEG Freescale Semiconductor, MC33989PEG Datasheet - Page 52

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MC33989PEG

Manufacturer Part Number
MC33989PEG
Description
SBC-HS
Manufacturer
Freescale Semiconductor
Datasheet

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TYPICAL APPLICATIONS
SUPPLEMENTAL APPLICATION NOTES
recommended to check for the CAN WU bit prior to setting the MC33989 is sleep or stop mode, in case bus traffic has occurred
while the CAN interface was in sleep mode.
CAN Wake-up Report in the SPI Registers
stop, normal or standby mode. This bit is set until the CAN is set by the SPI command in normal mode and CAN register read.
Pattern Wake-up
52
33989
In case the SBC uses such configuration, the SBC in normal mode and CAN sleep mode with wake-up enable, it is
After a CAN wake-up, a flag is set in the CAN register. Bit CAN-WU reports a CAN wake-up event while the SBC was in sleep,
In order to wake-up the CAN interface, the following criteria must be fulfilled:
• The CAN interface wake-up receiver must receive a series of 3 consecutive valid dominant pulses, each of them has to be
• The distance between 2 pulses must be lower than 500 μs and the three pulse must occur within a time frame of 1.0 ms.
The following figure illustrates the SBC key signals when a CAN wake-up occurs in Sleep or Stop mode.
2.5V
longer than 500 ns and shorter than 500 μs.
CAN wake-up: SBC in sleep mode. V1 turn on.
CANH
TX
CANL
RX
MC33989 CAN in Tx Rx mode
CANH-DOM
CANL-DOM
CANL/CANH-REC
CAN bus sleep state
Figure 41. SBC Key Signals
GND
Figure 40. Pattern Wake-up
TX sending node.
VDD start
CAN bus
WU receiver
MC33989 CAN in Sleep mode (wake-up enable)
Pulse # 1
min 500ns
max 500us
CANH-DOM
CANL-DOM
CAN wake-up: SBC in stop mode. INT pulse
Internal wake-up signal
Incoming CAN message
Pulse # 2
Analog Integrated Circuit Device Data
CANH-DOM
CANL-DOM
Freescale Semiconductor
CANH-DOM
Pulse # 3
CANL-DOM
Terminal
INT

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