PIC12F1822-E/MF Microchip Technology, PIC12F1822-E/MF Datasheet - Page 338

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PIC12F1822-E/MF

Manufacturer Part Number
PIC12F1822-E/MF
Description
3.5 KB Flash, 128 Bytes RAM, 32 MHz Int. Osc, 6 I/0, Enhanced Mid Range Core 8 D
Manufacturer
Microchip Technology
Series
PIC® XLP™ 12Fr
Datasheets

Specifications of PIC12F1822-E/MF

Core Processor
PIC
Core Size
8-Bit
Speed
32MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
6
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
8-DFN
Processor Series
PIC12F
Core
PIC
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
ICE2000
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
PIC12F/LF1822/PIC16F/LF1823
RETFIE
Syntax:
Operands:
Operation:
Status Affected:
Description:
Words:
Cycles:
Example:
RETLW
Syntax:
Operands:
Operation:
Status Affected:
Description:
Words:
Cycles:
Example:
TABLE
DS41413B-page 338
Return from Interrupt
[ label ]
None
TOS  PC,
1  GIE
None
Return from Interrupt. Stack is POPed
and Top-of-Stack (TOS) is loaded in
the PC. Interrupts are enabled by
setting Global
Interrupt Enable bit, GIE
(INTCON<7>). This is a two-cycle
instruction.
1
2
After Interrupt
Return with literal in W
[ label ]
0  k  255
k  (W);
TOS  PC
None
The W register is loaded with the eight
bit literal ‘k’. The program counter is
loaded from the top of the stack (the
return address). This is a two-cycle
instruction.
1
2
Before Instruction
After Instruction
RETFIE
CALL TABLE;W contains table
ADDWF PC ;W = offset
RETLW k1 ;Begin table
RETLW k2 ;
RETLW kn ; End of table
;offset value
;W now has table value
RETFIE
RETLW k
PC =
GIE =
W
W
=
=
TOS
1
0x07
value of k8
Preliminary
RETURN
Syntax:
Operands:
Operation:
Status Affected:
Description:
RLF
Syntax:
Operands:
Operation:
Status Affected:
Description:
Words:
Cycles:
Example:
TOS  PC
Return from subroutine. The stack is
Return from Subroutine
[ label ]
None
None
POPed and the top of the stack (TOS)
is loaded into the program counter.
This is a two-cycle instruction.
Rotate Left f through Carry
[ label ]
0  f  127
d  [0,1]
See description below
C
The contents of register ‘f’ are rotated
one bit to the left through the Carry
flag. If ‘d’ is ‘0’, the result is placed in
the W register. If ‘d’ is ‘1’, the result is
stored back in register ‘f’.
1
1
Before Instruction
After Instruction
RLF
 2010 Microchip Technology Inc.
RETURN
C
REG1
C
REG1
W
C
RLF
REG1,0
Register f
f,d
=
=
=
=
=
1110 0110
0
1110 0110
1100 1100
1

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