PIC12F1822-E/MF Microchip Technology, PIC12F1822-E/MF Datasheet - Page 397

• Manufacturer Part Number: PIC12F1822-E/MF
• Description: 3.5 KB Flash, 128 Bytes RAM, 32 MHz Int. Osc, 6 I/0, Enhanced Mid Range Core 8 D
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 12Fr

Specifications of PIC12F1822-E/MF

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 32MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 6
• Program Memory Size: 3.5KB (2K x 14)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 8-DFN
• Processor Series: PIC12F
• Core: PIC
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: ICE2000
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Extended Instruction Set
F
Fail-Safe Clock Monitor....................................................... 67
Firmware Instructions........................................................ 327
Fixed Voltage Reference (FVR) ........................................ 134
Flash Program Memory .................................................... 105
FSR Register .......... 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41
FVRCON (Fixed Voltage Reference Control) Register ..... 135
I
I
INDF Register ......... 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41
Indirect Addressing ............................................................. 45
Instruction Format ............................................................. 328
Instruction Set ................................................................... 327
 2010 Microchip Technology Inc.
2
C Mode (MSSPx)
Synchronous Slave Mode
ADDFSR ................................................................... 331
Fail-Safe Condition Clearing ....................................... 67
Fail-Safe Detection ..................................................... 67
Fail-Safe Operation..................................................... 67
Reset or Wake-up from Sleep..................................... 67
Associated Registers ................................................ 135
Erasing...................................................................... 110
Modifying................................................................... 114
Writing....................................................................... 110
Acknowledge Sequence Timing................................ 271
Bus Collision
Effects of a Reset...................................................... 272
I
Master Mode
Multi-Master Communication, Bus Collision and
Multi-Master Mode .................................................... 272
Read/Write Bit Information (R/W Bit) ........................ 248
Slave Mode
Sleep Operation ........................................................ 272
Stop Condition Timing............................................... 271
ADDLW ..................................................................... 331
ADDWF..................................................................... 331
ADDWFC .................................................................. 331
ANDLW ..................................................................... 331
ANDWF..................................................................... 331
BRA........................................................................... 332
CALL ......................................................................... 333
CALLW...................................................................... 333
LSLF ......................................................................... 335
LSRF......................................................................... 335
MOVF........................................................................ 335
2
C Clock Rate w/BRG.............................................. 279
Associated Registers
Reception.......................................................... 308
Transmission .................................................... 306
Associated Registers
Reception.......................................................... 311
Transmission .................................................... 310
During a Repeated Start Condition ................... 276
During a Stop Condition.................................... 277
Operation .......................................................... 263
Reception.......................................................... 269
Start Condition Timing .............................. 265, 266
Transmission .................................................... 267
Arbitration ......................................................... 272
Transmission .................................................... 253
Receive..................................................... 309
Transmit.................................................... 307
Receive..................................................... 311
Transmit.................................................... 310
PIC12F/LF1822/PIC16F/LF1823
Preliminary
INTCON Register................................................................ 91
Internal Oscillator Block
Internal Sampling Switch (R
Internet Address ............................................................... 401
Interrupt-On-Change......................................................... 130
Interrupts ............................................................................ 85
INTOSC Specifications ..................................................... 357
IOCAF Register ................................................................ 131
IOCAN Register ................................................................ 131
IOCAP Register ................................................................ 131
L
LATA Register .......................................................... 125, 128
Load Conditions................................................................ 355
LSLF ................................................................................. 335
LSRF ................................................................................ 335
M
Master Synchronous Serial Port. See MSSPx
MCLR ................................................................................. 80
MOVIW ..................................................................... 336
MOVLB ..................................................................... 336
MOVWI ..................................................................... 337
OPTION.................................................................... 337
RESET...................................................................... 337
SUBWFB .................................................................. 339
TRIS ......................................................................... 340
BCF .......................................................................... 332
BSF........................................................................... 332
BTFSC...................................................................... 332
BTFSS ...................................................................... 332
CALL......................................................................... 333
CLRF ........................................................................ 333
CLRW ....................................................................... 333
CLRWDT .................................................................. 333
COMF ....................................................................... 333
DECF........................................................................ 333
DECFSZ ................................................................... 334
GOTO ....................................................................... 334
INCF ......................................................................... 334
INCFSZ..................................................................... 334
IORLW ...................................................................... 334
IORWF...................................................................... 334
MOVLW .................................................................... 336
MOVWF.................................................................... 336
NOP.......................................................................... 337
RETFIE..................................................................... 338
RETLW ..................................................................... 338
RETURN................................................................... 338
RLF........................................................................... 338
RRF .......................................................................... 339
SLEEP ...................................................................... 339
SUBLW..................................................................... 339
SUBWF..................................................................... 339
SWAPF..................................................................... 340
XORLW .................................................................... 340
XORWF .................................................................... 340
INTOSC
Associated Registers................................................ 132
ADC .......................................................................... 144
Associated registers w/ Interrupts .............................. 96
Configuration Word w/ Clock Sources........................ 71
Configuration Word w/ Reference Clock Sources ...... 75
TMR1........................................................................ 181
Internal........................................................................ 80
Specifications ................................................... 357
SS
) Impedance ..................... 149
DS41413B-page 397