PIC16F1527-E/MR Microchip Technology, PIC16F1527-E/MR Datasheet - Page 106

64-pin, 28KB Flash, 1536B RAM, 10-bit ADC, 10xCCP, 2xSPI, 2xMI2C, 2xEUSART, 2.3V

PIC16F1527-E/MR

Manufacturer Part Number
PIC16F1527-E/MR
Description
64-pin, 28KB Flash, 1536B RAM, 10-bit ADC, 10xCCP, 2xSPI, 2xMI2C, 2xEUSART, 2.3V
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Datasheet

Specifications of PIC16F1527-E/MR

Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
28KB (16K x 14)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 5.5 V
Data Converters
A/D 30x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
64-VFQFN Exposed Pad
Core
PIC
Processor Series
PIC16F
Data Bus Width
8 bit
Maximum Clock Frequency
20 MHz
Data Ram Size
1536 B
Number Of Programmable I/os
54
Operating Supply Voltage
2.3 V to 5.5 V
Mounting Style
SMD/SMT
Interface Type
SPI, I2C
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
EXAMPLE 11-2:
; This row erase routine assumes the following:
; 1. A valid address within the erase row is loaded in ADDRH:ADDRL
; 2. ADDRH and ADDRL are located in shared data memory 0x70 - 0x7F (common RAM)
BCF
BANKSEL
MOVF
MOVWF
MOVF
MOVWF
BCF
BSF
BSF
MOVLW
MOVWF
MOVLW
MOVWF
BSF
NOP
NOP
BCF
BSF
ERASING ONE ROW OF PROGRAM MEMORY
INTCON,GIE
PMADRL
ADDRL,W
PMADRL
ADDRH,W
PMADRH
PMCON1,CFGS
PMCON1,FREE
PMCON1,WREN
55h
PMCON2
0AAh
PMCON2
PMCON1,WR
PMCON1,WREN
INTCON,GIE
; Disable ints so required sequences will execute properly
; Load lower 8 bits of erase address boundary
; Load upper 6 bits of erase address boundary
; Not configuration space
; Specify an erase operation
; Enable writes
; Start of required sequence to initiate erase
; Write 55h
;
; Write AAh
; Set WR bit to begin erase
; NOP instructions are forced as processor starts
; row erase of program memory.
;
; The processor stalls until the erase process is complete
; after erase processor continues with 3rd instruction
; Disable writes
; Enable interrupts

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