PIC18F96J60T-I/PF Microchip Technology, PIC18F96J60T-I/PF Datasheet - Page 131

• Manufacturer Part Number: PIC18F96J60T-I/PF
• Description: 64KB Flash, 12KB RAM, 10BASE-T Ethernet 100 TQFP 14x14x1mm T/R
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F96J60T-I/PF

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 41.667MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Ram Size: 3808 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3808 B
• Interface Type: Display Driver, Ethernet, EUSART, I2C, MSSP, SPI
• Maximum Clock Frequency: 41.667 MHz
• Number Of Programmable I/os: 70
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM183033, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164333 - MODULE SKT FOR PM3 100QFPAC162064 - HEADER INTFC MPLABICD2 64/80/100
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

9.3
The PIE registers contain the individual enable bits for
the peripheral interrupts. Due to the number of
peripheral interrupt sources, there are three Peripheral
Interrupt Enable registers (PIE1, PIE2, PIE3). When
IPEN = 0, the PEIE bit must be set to enable any of
these peripheral interrupts.
REGISTER 9-7:
© 2009 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Note 1:
PSPIE
R/W-0
PIE Registers
(1)
Implemented in 100-pin devices in Microcontroller mode only.
PSPIE: Parallel Slave Port Read/Write Interrupt Enable bit
1 = Enabled
0 = Disabled
ADIE: A/D Converter Interrupt Enable bit
1 = Enabled
0 = Disabled
RC1IE: EUSART1 Receive Interrupt Enable bit
1 = Enabled
0 = Disabled
TX1IE: EUSART1 Transmit Interrupt Enable bit
1 = Enabled
0 = Disabled
SSP1IE: MSSP1 Interrupt Enable bit
1 = Enabled
0 = Disabled
CCP1IE: ECCP1 Interrupt Enable bit
1 = Enabled
0 = Disabled
TMR2IE: TMR2 to PR2 Match Interrupt Enable bit
1 = Enabled
0 = Disabled
TMR1IE: TMR1 Overflow Interrupt Enable bit
1 = Enabled
0 = Disabled
R/W-0
ADIE
PIE1: PERIPHERAL INTERRUPT ENABLE REGISTER 1
W = Writable bit
‘1’ = Bit is set
RC1IE
R/W-0
R/W-0
TX1IE
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
PIC18F97J60 FAMILY
SSP1IE
R/W-0
(1)
CCP1IE
R/W-0
x = Bit is unknown
TMR2IE
R/W-0
DS39762E-page 131
TMR1IE
R/W-0
bit 0