PIC18F96J60T-I/PF Microchip Technology, PIC18F96J60T-I/PF Datasheet - Page 316

• Manufacturer Part Number: PIC18F96J60T-I/PF
• Description: 64KB Flash, 12KB RAM, 10BASE-T Ethernet 100 TQFP 14x14x1mm T/R
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F96J60T-I/PF

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 41.667MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Ram Size: 3808 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3808 B
• Interface Type: Display Driver, Ethernet, EUSART, I2C, MSSP, SPI
• Maximum Clock Frequency: 41.667 MHz
• Number Of Programmable I/os: 70
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM183033, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164333 - MODULE SKT FOR PM3 100QFPAC162064 - HEADER INTFC MPLABICD2 64/80/100
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

PIC18F97J60 FAMILY
FIGURE 20-3:
FIGURE 20-4:
FIGURE 20-5:
DS39762E-page 316
Note: This timing diagram shows two consecutive transmissions.
(Interrupt Reg. Flag)
Reg. Empty Flag)
Reg. Empty Flag)
Write to TXREGx
(Transmit Buffer
Reg. Empty Flag)
Write to TXREGx
(Transmit Shift
(Transmit Shift
BRG Output
(Shift Clock)
BRG Output
(Shift Clock)
TRMT bit
TXx (pin)
TXxIF bit
TXx (pin)
TRMT bit
TXxIF bit
BRG16
TXxIE
Interrupt
1 T
EUSARTx TRANSMIT BLOCK DIAGRAM
SPBRGHx
ASYNCHRONOUS TRANSMISSION, TXCKP = 0 (TXx NOT INVERTED)
ASYNCHRONOUS TRANSMISSION (BACK-TO-BACK), TXCKP = 0
(TXx NOT INVERTED)
Baud Rate Generator
TXxIF
TXEN
Word 1
Transmit Shift Reg
CY
Transmit Shift Reg.
Word 1
Word 1
Word 1
Baud Rate CLK
1 T
SPBRGx
CY
Start bit
Start bit
Word 2
MSb
(8)
1 T
CY
bit 0
bit 0
TXREGx Register
TSR Register
TX9D
• • •
bit 1
TX9
8
Data Bus
Word 1
bit 1
Word 1
LSb
0
bit 7/8
TRMT SPEN
bit 7/8
and Control
Pin Buffer
Word 2
Transmit Shift Reg.
© 2009 Microchip Technology Inc.
Stop bit
Stop bit
TXCKP
Start bit
Word 2
TXx pin
bit 0