PIC18F96J65T-I/PF Microchip Technology, PIC18F96J65T-I/PF Datasheet - Page 210
![96KB Flash, 12KB RAM, 10BASE-T Ethernet 100 TQFP 14x14x1mm T/R](/photos/12/13/121330/c04-100-tqfp_sml.jpg)
PIC18F96J65T-I/PF
Manufacturer Part Number
PIC18F96J65T-I/PF
Description
96KB Flash, 12KB RAM, 10BASE-T Ethernet 100 TQFP 14x14x1mm T/R
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F66J65-IPT.pdf
(8 pages)
3.PIC18F66J65-IPT.pdf
(480 pages)
4.PIC18F66J65-IPT.pdf
(4 pages)
5.PIC18F66J65-IPT.pdf
(10 pages)
6.PIC18F96J60-IPT.pdf
(24 pages)
Specifications of PIC18F96J65T-I/PF
Core Processor
PIC
Core Size
8-Bit
Speed
41.667MHz
Connectivity
EBI/EMI, Ethernet, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
70
Program Memory Size
96KB (48K x 16)
Program Memory Type
FLASH
Ram Size
3808 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3808 B
Interface Type
Display Driver, Ethernet, EUSART, I2C, MSSP, SPI
Maximum Clock Frequency
41.667 MHz
Number Of Programmable I/os
70
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM183033, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162064 - HEADER INTFC MPLABICD2 64/80/100
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F96J65T-I/PF
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC16F616T-ISL PDF datasheet
- PIC18F66J65-IPT PDF datasheet #2
- PIC18F66J65-IPT PDF datasheet #3
- PIC18F66J65-IPT PDF datasheet #4
- PIC18F66J65-IPT PDF datasheet #5
- PIC18F96J60-IPT PDF datasheet #6
- Current page: 210 of 480
- Download datasheet (8Mb)
configured to supply (source) current to the LEDs. Users
PIC18F97J60 FAMILY
18.1
18.1.1
PIC18F97J60 family devices all provide a dedicated
4-pin signal interface for the Ethernet module. No other
microcontroller or peripheral functions are multiplexed
with these pins, so potential device configuration
conflicts do not need to be considered. The pins are:
• TPIN+: Differential plus twisted-pair input
• TPIN-: Differential minus twisted-pair input
• TPOUT+: Differential plus twisted-pair output
• TPOUT-: Differential minus twisted-pair output
No provisions are made for providing or receiving
digital Ethernet data from an external Ethernet PHY.
In addition to the signal connections, the Ethernet mod-
ule has its own independent voltage source and ground
connections for the PHY module. Separate connections
are provided for the receiver (V
transmitter (V
internal PLL (V
requirements are the same as V
microcontroller, the pins are not internally connected.
For the Ethernet module to operate properly, supply
voltage and ground must be connected to these pins. All
of the microcontroller’s power and ground supply pins
should be externally connected to the same power
source or ground node, with no inductors or other filter
components between the microcontroller and Ethernet
module’s V
Besides the independent voltage connections, the PHY
module has a separate bias current input pin, RBIAS. A
bias current, derived from an external resistor, must be
applied to RBIAS for proper transceiver operation.
18.1.2
The PHY module provides separate outputs to drive the
standard Ethernet indicators, LEDA and LEDB. The LED
outputs are multiplexed with PORTA pins RA0 and RA1.
Their use as LED outputs is enabled by setting the Con-
figuration bit, ETHLED (Register 24-6, CONFIG3H<2>).
When configured as LED outputs, RA0/LEDA and
RA1/LEDB have sufficient drive capacity (up to 25 mA)
to directly power the LEDs. The pins must always be
must also configure the pins as outputs by clearing
TRISA<1:0>.
DS39762E-page 210
Physical Interfaces and External
Connections
DD
SIGNAL AND POWER INTERFACES
LED CONFIGURATION
DDTX
pins.
DDPLL
and V
and V
SSTX
SSPLL
) and the transmitter’s
DDRX
). Although the voltage
DD
and V
and V
SSRX
SS
for the
), the
The
automatically display link status, RX/TX activity, etc. A
configurable stretch capability prolongs the LED blink
duration for short events, such as a single packet
transmit, allowing human perception. The options are
controlled by the PHLCON register (Register 18-13).
Typical values for blink stretch are listed in Table 18-1.
TABLE 18-1:
18.1.3
The Ethernet module is designed to operate at 25 MHz.
This is provided by the primary microcontroller clock,
either with a 25 MHz crystal connected to the OSC1
and OSC2 pins or an external clock source connected
to the OSC1 pin. No provision is made to clock the
module from a different source.
To maintain the required clock frequency, the microcon-
troller can operate only from the primary oscillator
source (PRI_RUN or PRI_IDLE modes) while the
Ethernet module is enabled. Using any other
power-managed mode will require that the Ethernet
module be disabled.
18.1.3.1
The Ethernet module contains a start-up timer,
independent of the microcontroller’s OST, to ensure
that the PHY module’s PLL has stabilized before
operation. Clearing the module enable bit, ETHEN
(ECON2<5>),
(ESTAT<0>). Setting the ETHEN bit causes this
start-up timer to start counting. When the timer expires,
after 1 ms, the PHYRDY bit will be automatically set.
After enabling the module by setting the ETHEN bit, the
application software should always poll PHYRDY to
determine when normal Ethernet operation can begin.
T
T
T
NSTRCH
MSTRCH
LSTRCH
Stretch Length
LEDs
(long)
(normal)
(medium)
OSCILLATOR REQUIREMENTS
Start-up Timer
can
clears
LED BLINK STRETCH
LENGTH
be
© 2009 Microchip Technology Inc.
the
individually
Typical Stretch (ms)
PHYRDY
140
configured
40
70
status
bit
to
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