PIC18F96J65T-I/PF Microchip Technology, PIC18F96J65T-I/PF Datasheet - Page 350

• Manufacturer Part Number: PIC18F96J65T-I/PF
• Description: 96KB Flash, 12KB RAM, 10BASE-T Ethernet 100 TQFP 14x14x1mm T/R
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F96J65T-I/PF

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 41.667MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 96KB (48K x 16)
• Program Memory Type: FLASH
• Ram Size: 3808 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3808 B
• Interface Type: Display Driver, Ethernet, EUSART, I2C, MSSP, SPI
• Maximum Clock Frequency: 41.667 MHz
• Number Of Programmable I/os: 70
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM183033, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162064 - HEADER INTFC MPLABICD2 64/80/100
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

PIC18F97J60 FAMILY
TABLE 24-1:
DS39762E-page 350
300000h CONFIG1L
300001h CONFIG1H
300002h CONFIG2L
300003h CONFIG2H
300004h CONFIG3L
300005h CONFIG3H
3FFFFEh DEVID1
3FFFFFh DEVID2
Legend:
Note 1:
File Name
2:
3:
4:
5:
6:
x = unknown, u = unchanged, - = unimplemented. Shaded cells are unimplemented, read as ‘0’.
Values reflect the unprogrammed state as received from the factory and following Power-on Resets. In all other Reset
states, the configuration bytes maintain their previously programmed states.
The value of these bits in program memory should always be ‘1’. This ensures that the location is executed as a NOP if it
is accidentally executed.
This bit should always be maintained as ‘0’.
Implemented on 100-pin devices only.
Implemented on 80-pin and 100-pin devices only.
See Register 24-7 and Register 24-8 for DEVID values. These registers are read-only and cannot be programmed by
the user.
CONFIGURATION BITS AND DEVICE IDs
DEBUG
WAIT
DEV10
DEV2
IESO
Bit 7
—
—
—
(2)
(2)
(2)
(4)
FCMEN
XINST
BW
DEV1
DEV9
Bit 6
—
—
—
(2)
(2)
(2)
(4)
STVREN
EMB1
DEV0
DEV8
Bit 5
—
—
—
—
(2)
(2)
(2)
(4)
EMB0
REV4
DEV7
Bit 4
—
—
—
—
—
(2)
(2)
(2)
(4)
EASHFT
WDTPS3
REV3
DEV6
Bit 3
—
—
—
—
(3)
(4)
WDTPS2
ETHLED ECCPMX
FOSC2
REV2
DEV5
Bit 2
CP0
—
—
WDTPS1
FOSC1
REV1
DEV4
Bit 1
—
—
—
© 2009 Microchip Technology Inc.
(5)
CCP2MX
WDTPS0
WDTEN
FOSC0
REV0
DEV3
Bit 0
—
—
(5)
Unprogrammed
110- ---1
---- 01--
11-- -111
---- 1111
1111 1---
---- -111
xxxx xxxx
xxxx xxxx
Default/
Value
(1)
(6)
(6)