PIC18F96J65T-I/PF Microchip Technology, PIC18F96J65T-I/PF Datasheet - Page 46

• Manufacturer Part Number: PIC18F96J65T-I/PF
• Description: 96KB Flash, 12KB RAM, 10BASE-T Ethernet 100 TQFP 14x14x1mm T/R
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F96J65T-I/PF

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 41.667MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 96KB (48K x 16)
• Program Memory Type: FLASH
• Ram Size: 3808 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3808 B
• Interface Type: Display Driver, Ethernet, EUSART, I2C, MSSP, SPI
• Maximum Clock Frequency: 41.667 MHz
• Number Of Programmable I/os: 70
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM183033, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162064 - HEADER INTFC MPLABICD2 64/80/100
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

PIC18F97J60 FAMILY
TABLE 2-2:
2.7
The PIC18F97J60 family of devices includes a feature
that allows the device clock source to be switched from
the main oscillator to an alternate clock source. These
devices also offer two alternate clock sources. When
an alternate clock source is enabled, the various
power-managed operating modes are available.
Essentially, there are three clock sources for these
devices:
• Primary oscillators
• Secondary oscillators
• Internal oscillator block
The primary oscillators include the External Crystal
and Resonator modes and the External Clock modes.
The particular mode is defined by the FOSC2:FOSC0
Configuration bits. The details of these modes are
covered earlier in this chapter.
DS39762E-page 46
Legend: x = Don’t care
Note 1:
2:
Disabled
Enabled
5x PLL
Clock Sources and Oscillator
Switching
Reserved configuration; represents a clock frequency beyond the microcontroller’s operating range.
The prescaler is automatically disabled when the PLL and postscaler are both disabled.
DEVICE CLOCK SPEEDS FOR VARIOUS PLL BLOCK CONFIGURATIONS
PLL Prescaler
Disabled
÷2
÷3
÷2
÷3
(2)
PLL Postscaler
Disabled
Disabled
Disabled
÷2
÷3
÷2
÷3
÷2
÷3
÷2
÷3
The secondary oscillators are those external sources
not connected to the OSC1 or OSC2 pins. These
sources may continue to operate even after the controller
is placed in a power-managed mode. The PIC18F97J60
family of devices offers the Timer1 oscillator as a second-
ary oscillator. In all power-managed modes, this oscillator
is often the time base for functions such as a Real-Time
Clock (RTC).
Most often, a 32.768 kHz watch crystal is connected
between the RC0/T1OSO/T13CKI and RC1/T1OSI
pins. Loading capacitors are also connected from each
pin to ground. The Timer1 oscillator is discussed in
greater detail in Section 12.3 “Timer1 Oscillator”.
In addition to being a primary clock source, the internal
oscillator is available as a power-managed mode
clock source. The INTRC source is also used as the
clock source for several special features, such as the
WDT and Fail-Safe Clock Monitor.
The clock sources for the PIC18F97J60 family devices
are shown in Figure 2-1. See Section 24.0 “Special
Features of the CPU” for Configuration register details.
(OSCTUNE<7:4>)
Configuration
PLL Block
x101
1111
0111
x100
1110
0110
x00x
1011
0011
1010
0010
© 2009 Microchip Technology Inc.
Clock Frequency
25 (Default)
(Note 1)
31.2500
20.8333
41.6667
20.8333
13.8889
6.2500
4.1667
4.1667
2.7778
(MHz)