PIC24FJ64GA106-I/MR Microchip Technology, PIC24FJ64GA106-I/MR Datasheet - Page 194

• Manufacturer Part Number: PIC24FJ64GA106-I/MR
• Description: 16-bit, 16 MIPS, 64KB Flash, 16Kb RAM, 84 I/O, NanoWatt 64 QFN 9x9x0.9mm TUBE
• Manufacturer: Microchip Technology
• Series: PIC® 24Fr

Specifications of PIC24FJ64GA106-I/MR

• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 64KB (22K x 24)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN Exposed Pad
• Processor Series: PIC24FJ256GA110
• Core: PIC
• Data Bus Width: 16 bit
• Data Ram Size: 16 KB
• Interface Type: UART, I2C, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Timers: 5
• Operating Supply Voltage: 3.6 V
• Maximum Operating Temperature: - 40 C to + 85 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

PIC24FJ256GA110 FAMILY
17.1
The UART module includes a dedicated 16-bit Baud
Rate Generator. The UxBRG register controls the
period of a free-running, 16-bit timer.
shows the formula for computation of the baud rate
with BRGH = 0.
EQUATION 17-1:
Example 17-1
error for the following conditions:
• F
• Desired Baud Rate = 9600
EXAMPLE 17-1:
DS39905E-page 194
Note 1:
Desired Baud Rate
Solving for UxBRG value:
Calculated Baud Rate = 4000000/(16 (25 + 1))
Error
Note 1:
CY
= 4 MHz
2:
UART Baud Rate Generator (BRG)
UxBRG
UxBRG
UxBRG
Baud Rate =
UxBRG =
F
frequency (F
Based on F
and PLL are disabled.
Based on F
CY
shows the calculation of the baud rate
denotes the instruction cycle clock
UART BAUD RATE WITH
BRGH = 0
BAUD RATE ERROR CALCULATION (BRGH = 0)
= F
= ((F
= ((4000000/9600)/16) – 1
= 25
= 9615
= (Calculated Baud Rate – Desired Baud Rate)
= (9615 – 9600)/9600
= 0.16%
16 • (UxBRG + 1)
CY
16 • Baud Rate
OSC
CY
Desired Baud Rate
CY
= F
= F
CY
/2).
/(16 (UxBRG + 1))
F
F
CY
OSC
CY
/Desired Baud Rate)/16) – 1
OSC
(1,2)
/2, Doze mode
/2, Doze mode and PLL are disabled.
Equation 17-1
– 1
The maximum baud rate (BRGH = 0) possible is
F
possible is F
Equation 17-2
the baud rate with BRGH = 1.
EQUATION 17-2:
The maximum baud rate (BRGH = 1) possible is F
(for UxBRG = 0) and the minimum baud rate possible
is F
Writing a new value to the UxBRG register causes the
BRG timer to be reset (cleared). This ensures the BRG
does not wait for a timer overflow before generating the
new baud rate.
CY
Note 1:
CY
/16 (for UxBRG = 0) and the minimum baud rate
/(4 * 65536).
2:
Baud Rate =
UxBRG =
CY
F
frequency.
Based on F
and PLL are disabled.
CY
/(16 * 65536).
shows the formula for computation of
(1)
denotes the instruction cycle clock
UART BAUD RATE WITH
BRGH = 1
 2010 Microchip Technology Inc.
4 • (UxBRG + 1)
CY
4 • Baud Rate
= F
F
F
OSC
CY
CY
(1,2)
/2, Doze mode
– 1
CY
/4