SC16C852VIET-G NXP Semiconductors, SC16C852VIET-G Datasheet - Page 54

• Manufacturer Part Number: SC16C852VIET-G
• Manufacturer: NXP Semiconductors

Specifications of SC16C852VIET-G

• Transmitter And Receiver Fifo Counter: Yes
• Data Rate: 5Mbps
• Mounting: Surface Mount
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Industrial
• Number Of Channels: 2
• Lead Free Status / RoHS Status: Compliant

NXP Semiconductors
17. Contents
1
2
3
4
5
5.1
5.2
6
6.1
6.2
6.3
6.4
6.4.1
6.4.2
6.5
6.6
6.7
6.8
6.9
6.10
6.11
6.12
6.12.1
6.12.2
6.13
6.14
6.14.1
6.14.2
6.14.3
6.14.3.1
6.14.3.2
7
7.1
7.2
7.2.1
7.2.2
7.3
7.3.1
7.3.1.1
7.3.1.2
7.3.2
7.4
7.5
7.6
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Ordering information . . . . . . . . . . . . . . . . . . . . . 2
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pinning information . . . . . . . . . . . . . . . . . . . . . . 5
Functional description . . . . . . . . . . . . . . . . . . . 9
Register descriptions . . . . . . . . . . . . . . . . . . . 20
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 6
UART A-B functions . . . . . . . . . . . . . . . . . . . . . 9
Extended mode (128-byte FIFO) . . . . . . . . . . 10
Internal registers. . . . . . . . . . . . . . . . . . . . . . . 10
FIFO operation . . . . . . . . . . . . . . . . . . . . . . . . 11
32-byte FIFO mode. . . . . . . . . . . . . . . . . . . . . 11
128-byte FIFO mode. . . . . . . . . . . . . . . . . . . . 11
Hardware flow control . . . . . . . . . . . . . . . . . . . 11
Software flow control . . . . . . . . . . . . . . . . . . . 12
Special character detect . . . . . . . . . . . . . . . . . 13
Interrupt priority and time-out interrupts . . . . . 13
Programmable baud rate generator . . . . . . . . 14
DMA operation . . . . . . . . . . . . . . . . . . . . . . . . 16
Loopback mode . . . . . . . . . . . . . . . . . . . . . . . 16
Sleep mode. . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Conditions to enter Sleep mode . . . . . . . . . . . 18
Conditions to resume normal operation . . . . . 18
Low power feature . . . . . . . . . . . . . . . . . . . . . 18
RS-485 features . . . . . . . . . . . . . . . . . . . . . . . 19
Auto RS-485 RTS control . . . . . . . . . . . . . . . . 19
RS-485 RTS inversion . . . . . . . . . . . . . . . . . . 19
Auto 9-bit mode (RS-485). . . . . . . . . . . . . . . . 19
Normal Multi-drop mode . . . . . . . . . . . . . . . . . 19
Auto address detection . . . . . . . . . . . . . . . . . . 20
Transmit (THR) and Receive (RHR) Holding
Registers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Interrupt Enable Register (IER) . . . . . . . . . . . 23
IER versus transmit/receive FIFO interrupt
mode operation. . . . . . . . . . . . . . . . . . . . . . . . 24
IER versus receive/transmit FIFO polled
mode operation. . . . . . . . . . . . . . . . . . . . . . . . 24
FIFO Control Register (FCR) . . . . . . . . . . . . . 25
DMA mode . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Mode 0 (FCR bit 3 = 0) . . . . . . . . . . . . . . . . . . 25
Mode 1 (FCR bit 3 = 1) . . . . . . . . . . . . . . . . . . 25
FIFO mode . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Interrupt Status Register (ISR) . . . . . . . . . . . . 27
Line Control Register (LCR) . . . . . . . . . . . . . . 28
Modem Control Register (MCR) . . . . . . . . . . . 29
Dual UART with 128-byte FIFOs, IrDA, and XScale VLIO bus interface
7.7
7.8
7.9
7.10
7.11
7.12
7.13
7.14
7.15
7.16
7.17
7.18
7.19
7.20
7.21
7.22
7.23
8
9
10
10.1
11
12
12.1
12.2
12.3
12.4
13
14
15
15.1
15.2
15.3
15.4
16
17
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2008.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [e-mail]
Limiting values . . . . . . . . . . . . . . . . . . . . . . . . 39
Static characteristics . . . . . . . . . . . . . . . . . . . 39
Dynamic characteristics . . . . . . . . . . . . . . . . . 40
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 47
Soldering of SMD packages . . . . . . . . . . . . . . 49
Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . 51
Revision history . . . . . . . . . . . . . . . . . . . . . . . 52
Legal information . . . . . . . . . . . . . . . . . . . . . . 53
Contact information . . . . . . . . . . . . . . . . . . . . 53
Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Line Status Register (LSR) . . . . . . . . . . . . . . 30
Modem Status Register (MSR) . . . . . . . . . . . 31
Extra Feature Control Register (EFCR) . . . . . 32
Scratchpad Register (SPR) . . . . . . . . . . . . . . 32
Division Latch (DLL and DLM) . . . . . . . . . . . . 32
Transmit FIFO Level Count (TXLVLCNT) . . . . 32
Receive FIFO Level Count (RXLVLCNT) . . . . 32
Enhanced Feature Register (EFR). . . . . . . . . 33
Transmit Interrupt Level register (TXINTLVL) . 34
Receive Interrupt Level register (RXINTLVL) . 34
Flow Control Trigger Level High (FLWCNTH). 35
Flow Control Trigger Level Low (FLWCNTL) . 35
Clock prescaler (CLKPRES) . . . . . . . . . . . . . 35
RS-485 turn-around time delay (RS485TIME) 36
Advanced Feature Control Register 1
(AFCR1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Advanced Feature Control Register 2
(AFCR2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
SC16C852V external reset condition and
software reset. . . . . . . . . . . . . . . . . . . . . . . . . 38
Timing diagrams. . . . . . . . . . . . . . . . . . . . . . . 41
Introduction to soldering. . . . . . . . . . . . . . . . . 49
Wave and reflow soldering . . . . . . . . . . . . . . . 49
Wave soldering. . . . . . . . . . . . . . . . . . . . . . . . 49
Reflow soldering. . . . . . . . . . . . . . . . . . . . . . . 50
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 53
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . 53
SC16C852V
Document identifier: SC16C852V_4
Date of release: 14 January 2008
All rights reserved.