FW82801EB S L73Z Intel, FW82801EB S L73Z Datasheet - Page 423

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FW82801EB S L73Z

Manufacturer Part Number
FW82801EB S L73Z
Description
Manufacturer
Intel
Datasheet

Specifications of FW82801EB S L73Z

Lead Free Status / RoHS Status
Not Compliant
10.1.17
10.1.18
Intel
®
82801EB ICH5 / 82801ER ICH5R Datasheet
INTR_LN—Interrupt Line Register
(IDE—D31:F1)
Address Offset:
Default Value:
INTR_PN—Interrupt Pin Register
(IDE—D31:F1)
Address Offset:
Default Value:
Bit
7:0
Bit
7:3
2:0
Interrupt Line (INT_LN) — R/W. This field is used to communicate to software the interrupt line that
the interrupt pin is connected to.
Reserved
Interrupt Pin (INT_PIN) — RO. Hardwired to 01h to indicate to “software” that the Intel
drive INTA#. Note that this is only used in native mode. Also note that the routing to the internal
interrupt controller doesn’t necessarily relate to the value in this register. The IDE interrupt is in fact
routed to PIRQC# (IRQ18 in APIC mode).
3Ch
00h
3Dh
01h
Description
Description
Attribute:
Size:
Attribute:
Size:
IDE Controller Registers (D31:F1)
RO
8 bits
R/W
8 bits
®
ICH5 will
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