ISP1183BS STEricsson, ISP1183BS Datasheet - Page 47

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ISP1183BS

Manufacturer Part Number
ISP1183BS
Description
Manufacturer
STEricsson
Datasheet

Specifications of ISP1183BS

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Table 55.
V
[1]
ISP1183_3
Product data sheet
Symbol
Read timing (see
t
t
t
t
t
t
t
t
t
Write timing (see
t
t
t
t
t
t
t
t
t
t
RHAX
AVRL
RHDZ
RHSH
RHRL
RLRH
SLRL
RLDV
RC
WHAX
AVWL
SLWL
WL
WLWH
WLWH
WHWL
WHSH
DVWH
WHDZ
BUS
(t
(t
The minimum value for data flow commands (see
RHRL
= V
WHWL
)
REG(3V3)
+ t
+
Dynamic characteristics: parallel interface timing
RLRH
16.1.1 Parallel I/O timing
16.1 Timing
= 2.7 V to 3.9 V; V
) read cycle time
Figure
Figure
Parameter
address hold time after RD_N HIGH
address setup time before RD_N LOW
data outputs high-impedance time after
RD_N HIGH
chip deselect time after RD_N HIGH
RD_N LOW after RD_N HIGH
RD_N pulse width
CS_N time before RD_N LOW
data valid time after RD_N LOW
address hold time after WR_N HIGH
address setup time before WR_N LOW
CS_N time before WR_N LOW
write cycle time
WR_N pulse width
WR_N LOW after WR_N HIGH
chip deselect time after WR_N HIGH
data setup time before WR_N HIGH
data hold time after WR_N HIGH
13)
14)
DD(I/O)
= 1.8 V; unless otherwise specified.
Table
Rev. 03 — 20 January 2009
13) is 180 ns.
Conditions
C
L
= 30 pF
Low-power USB Peripheral Controller with DMA
[1]
[1]
Min
0
0
0
−2
65
25
0
-
90
1
0
0
90/180
22
68/158
2
1
0
Typ
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
© ST-NXP Wireless 2009. All rights reserved.
Max
-
-
-
-
-
-
-
20
-
-
-
-
-
-
-
-
-
-
ISP1183
ns
ns
ns
ns
ns
ns
ns
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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