PSD834F2-15M STMicroelectronics, PSD834F2-15M Datasheet - Page 18

• Manufacturer Part Number: PSD834F2-15M
• Manufacturer: STMicroelectronics

Specifications of PSD834F2-15M

• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Operating Temperature Classification: Commercial
• Package Type: PQFP
• Mounting: Surface Mount
• Pin Count: 52
• Lead Free Status / RoHS Status: Compliant

PSD834F2V
Reading the Erase/Program Status Bits. The
PSD provides several status bits to be used by the
MCU to confirm the completion of an Erase or Pro-
gram cycle of Flash memory. These status bits
minimize the time that the MCU spends perform-
ing these tasks and are defined in Table 8. The
status bits can be read as many times as needed.
For Flash memory, the MCU can perform a READ
operation to obtain these status bits while an
Erase or Program instruction is being executed by
the embedded algorithm. See the section entitled
“Programming Flash Memory”, on page 19, for de-
tails.
Data Polling Flag (DQ7). When erasing or pro-
gramming in Flash memory, the Data Polling Flag
(DQ7) Bit outputs the complement of the bit being
entered for programming/writing on the DQ7 Bit.
Once the Program instruction or the WRITE oper-
ation is completed, the true logic value is read on
the Data Polling Flag (DQ7) Bit (in a READ opera-
tion).
■
■
■
■
Toggle Flag (DQ6). The PSD offers another way
for determining when the Flash memory Program
cycle is completed. During the internal WRITE op-
eration and when either the FS0-FS7 or
CSBOOT0-CSBOOT3 is true, the Toggle Flag
(DQ6) Bit toggles from '0' to '1' and '1' to '0' on sub-
sequent attempts to read any byte of the memory.
Table 8. Status Bit
Note: 1. X = Not guaranteed value, can be read either 1 or 0.
18/95
Functional Block
Data Polling is effective after the fourth WRITE
pulse (for a Program instruction) or after the
sixth WRITE pulse (for an Erase instruction). It
must be performed at the address being
programmed or at an address within the Flash
memory sector being erased.
During an Erase cycle, the Data Polling Flag
(DQ7) Bit outputs a '0.' After completion of the
cycle, the Data Polling Flag (DQ7) Bit outputs
the last bit programmed (it is a '1' after erasing).
If the byte to be programmed is in a protected
Flash memory sector, the instruction is ignored.
If all the Flash memory sectors to be erased are
protected, the Data Polling Flag (DQ7) Bit is
reset to '0' for about 100µs, and then returns to
the previous addressed byte. No erasure is
performed.
Flash Memory
2. DQ7-DQ0 represent the Data Bus Bits, D7-D0.
3. FS0-FS7 and CSBOOT0-CSBOOT3 are active High.
FS0-FS7/CSBOOT0-
CSBOOT3
V
IH
Polling
DQ7
Data
Toggle
DQ6
Flag
When the internal cycle is complete, the toggling
stops and the data READ on the Data Bus D0-D7
is the addressed memory byte. The device is now
accessible for a new READ or WRITE operation.
The cycle is finished when two successive READs
yield the same output data.
■
■
■
Error Flag (DQ5). During a normal Program or
Erase cycle, the Error Flag (DQ5) Bit is to '0.' This
bit is set to '1' when there is a failure during Flash
memory Byte Program, Sector Erase, or Bulk
Erase cycle.
In the case of Flash memory programming, the Er-
ror Flag (DQ5) Bit indicates the attempt to program
a Flash memory bit from the programmed state,
'0,' to the erased state, '1,' which is not valid. The
Error Flag (DQ5) Bit may also indicate a Time-out
condition while attempting to program a byte.
In case of an error in a Flash memory Sector Erase
or Byte Program cycle, the Flash memory sector in
which the error occurred or to which the pro-
grammed byte belongs must no longer be used.
Other Flash memory sectors may still be used.
The Error Flag (DQ5) Bit is reset after a Reset
Flash instruction.
Erase Time-out Flag (DQ3). The Erase Time-
out Flag (DQ3) Bit reflects the time-out period al-
lowed between two consecutive Sector Erase in-
structions. The Erase Time-out Flag (DQ3) Bit is
reset to '0' after a Sector Erase cycle for a time pe-
riod of 100µs + 20% unless an additional Sector
Erase instruction is decoded. After this time peri-
od, or when the additional Sector Erase instruction
is decoded, the Erase Time-out Flag (DQ3) Bit is
set to '1.'
The Toggle Flag (DQ6) Bit is effective after the
fourth WRITE pulse (for a Program instruction)
or after the sixth WRITE pulse (for an Erase
instruction).
If the byte to be programmed belongs to a
protected Flash memory sector, the instruction
is ignored.
If all the Flash memory sectors selected for
erasure are protected, the Toggle Flag (DQ6)
Bit toggles to '0' for about 100µs and then
returns to the previous addressed byte.
Error
DQ5
Flag
DQ4
X
Erase
Time-
DQ3
out
DQ2
X
DQ1
X
DQ0
X