ISP1581BD NXP Semiconductors, ISP1581BD Datasheet - Page 22

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ISP1581BD

Manufacturer Part Number
ISP1581BD
Description
Manufacturer
NXP Semiconductors
Datasheet

Specifications of ISP1581BD

Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Operating Temperature Classification
Industrial
Lead Free Status / RoHS Status
Compliant

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Philips Semiconductors
Table 12:
9397 750 13462
Product data
Bit
Symbol
Reset
Bus Reset
Access
Bit
Symbol
Reset
Bus Reset
Access
Bit
Symbol
Reset
Bus Reset
Access
Bit
Symbol
Reset
Bus Reset
Access
Interrupt Enable register: bit allocation
reserved
IEP6TX
IEP2TX
R/W
R/W
R/W
R/W
31
23
15
0
0
0
0
7
-
-
-
-
All data IN transactions use the Transmit buffers (TX), which are handled by the
DDBGMODIN bits. All data OUT transactions go via the Receive buffers (RX), which
are handled by the DDBGMODOUT bits. Transactions on Control endpoint 0 (IN,
OUT and SETUP) are handled by the CDBGMOD bits.
Interrupts caused by events on the USB bus (SOF, Pseudo SOF, suspend, resume,
bus reset, Setup and High-Speed Status) can also be controlled individually. A bus
reset disables all enabled interrupts except bit IEBRST (bus reset), which remains
unchanged.
The Interrupt Enable Register consists of 4 bytes. The bit allocation is given in
Table
Table 13:
Bit
31 to 26
25 to 12
11
10
9
8
7
IEP6RX
IEP2RX
IEDMA
R/W
R/W
R/W
R/W
30
22
14
0
0
0
0
6
0
0
-
-
12.
Interrupt Enable register: bit description
Symbol
-
IEP7TX to
IEP1RX
IEP0TX
IEP0RX
-
IEP0SETUP
-
IEHS_STA
IEP5TX
IEP1TX
R/W
R/W
R/W
R/W
29
21
13
0
0
0
0
5
0
0
Rev. 06 — 23 December 2004
-
-
reserved
IERESM
IEP5RX
IEP1RX
Description
reserved; must write logic 0
A logic 1 enables interrupt from the indicated endpoint.
A logic 1 enables interrupt from the Control IN endpoint 0.
A logic 1 enables interrupt from the Control OUT endpoint 0.
reserved
A logic 1 enables the interrupt for the Setup data received on
endpoint 0.
reserved
R/W
R/W
R/W
R/W
28
20
12
0
0
0
0
4
0
0
-
-
IESUSP
IEP4TX
IEP0TX
R/W
R/W
R/W
R/W
27
19
11
0
0
0
0
3
0
0
-
-
Hi-Speed USB peripheral controller
IEPSOF
IEP4RX
IEP0RX
R/W
R/W
R/W
R/W
26
18
10
0
0
0
0
2
0
0
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
-
-
reserved
IEP7TX
IEP3TX
IESOF
R/W
R/W
R/W
R/W
25
17
0
0
0
0
9
1
0
0
-
-
ISP1581
IEP0SETUP
unchanged
IEP7RX
IEP3RX
IEBRST
R/W
R/W
R/W
R/W
24
16
0
0
0
0
8
0
0
0
0
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