ISP1581BD NXP Semiconductors, ISP1581BD Datasheet - Page 45
![no-image](/images/manufacturer_photos/0/4/487/nxp_semiconductors_sml.jpg)
ISP1581BD
Manufacturer Part Number
ISP1581BD
Description
Manufacturer
NXP Semiconductors
Datasheet
1.ISP1581BD.pdf
(80 pages)
Specifications of ISP1581BD
Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Operating Temperature Classification
Industrial
Lead Free Status / RoHS Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ISP1581BD
Manufacturer:
PHILIPS
Quantity:
465
Part Number:
ISP1581BD
Manufacturer:
PHILIPS/飞利浦
Quantity:
20 000
Philips Semiconductors
Table 59:
9397 750 13462
Product data
Bit
Symbol
Reset
Bus reset
Access
Bit
Symbol
Reset
Bus reset
Access
Bit
Symbol
Reset
Bus reset
Access
Chip ID register: bit allocation
23
15
7
9.5.2 Chip ID register (address: 70H)
Table 58:
This read-only register contains the chip identification and the hardware version
numbers. The firmware should check this information to determine the functions and
features supported. The register contains 3 bytes and the bit allocation is shown in
Table
Bit
9
8
7
6
5
4
3
2
1
0
22
14
6
59.
Interrupt register: bit description
Symbol
reserved
EP0SETUP
reserved
DMA
HS_STAT
RESUME
SUSP
PSOF
SOF
BRESET
21
13
5
Rev. 06 — 23 December 2004
Description
reserved.
A logic 1 indicates that a SETUP token was received on
Endpoint 0.
reserved.
DMA status: A logic 1 indicates a change in the DMA Status
register.
High Speed Status:.A logic 1 indicates a change from FS to
HS mode (HS connection). This bit is not set, when the system
goes into a FS suspend.
Resume status: A logic 1 indicates that a status change from
‘suspend’ to ‘resume’ (active) was detected.
Suspend status: A logic 1 indicates that a status change from
active to ‘suspend’ was detected on the bus.
Pseudo SOF interrupt: A logic 1 indicates that a Pseudo SOF
or SOF was received. Pseudo SOF is an internally generated
clock signal (FS: 1 ms period, HS: 125 s period) synchronized
to the USB bus SOF/ SOF.
SOF interrupt: A logic 1 indicates that a SOF/ SOF was
received.
Bus Reset: A logic 1 indicates that a USB bus reset was
detected.
20
12
4
CHIPID[23:16]
VERSION[7:0]
CHIPID[15:8]
15H
15H
81H
81H
51H
51H
R
R
R
19
11
3
…continued
Hi-Speed USB peripheral controller
18
10
2
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
17
9
1
ISP1581
16
8
0
44 of 79