ISP1581BD NXP Semiconductors, ISP1581BD Datasheet - Page 72

• Manufacturer Part Number: ISP1581BD
• Manufacturer: NXP Semiconductors

Specifications of ISP1581BD

• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Operating Temperature Classification: Industrial
• Lead Free Status / RoHS Status: Compliant

Philips Semiconductors
Table 80:
V
[1]
15. Application information
9397 750 13462
Product data
Symbol
t
t
t
t
t
d9
d10
d11
d12
d13
CC
Interlock time is the time allowed between an action by one agent and the following action by the other agent. An agent can be a sender
or a receiver. Interlocking actions require a response signal from the other agent before processing can continue.
= 4.0 to 5.5 V; V
UDMA mode timing parameters
Parameter
ready to final strobe edge delay
DACK off to IORDY high-Z delay
DACK on to IORDY HIGH delay
final strobe edge to DREQ off or DIOW
on delay
first strobe delay after control signal on
GND
= 0 V; T
Fig 38. Typical interface connections for Generic Processor mode.
Fig 39. Typical interface connections for Split Bus mode (slave mode).
amb
= 40 to 85 C.
…continued
Rev. 06 — 23 December 2004
ALE/A0
ALE
address
latch
enable
CPU
Min
INTn
50
INT
0
0
-
-
MICROCONTROLLER
interrupt
Mode 0
ISP1581
(R/W)/RD DS/WR
8051
RD
Max
230
75
20
read
strobe
-
-
write strobe
read strobe
chip select
address 8
data
WR
write
strobe
Min
16
50
0
0
-
-
P0.7/AD7
P0.0/AD0
Mode 1
AD7 to
Hi-Speed USB peripheral controller
AD0
to
MGT516
DMA
AD7 to AD0
DATA15 to DATA0
(R/W)/RD
DS/WR
CS
8
address/data
Max
200
60
20
ISP1581
-
-
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
DATA [ 15:0 ]
DREQ
DACK
DIOW
DIOR
MGT515
Min
50
0
0
-
-
Mode 2
ISP1581
Max
170
50
20
-
-
71 of 79
Unit
ns
ns
ns
ns
ns