MCIMX255AJM4A Freescale, MCIMX255AJM4A Datasheet - Page 55

• Manufacturer Part Number: MCIMX255AJM4A
• Manufacturer: Freescale

Specifications of MCIMX255AJM4A

• Lead Free Status / RoHS Status: Compliant

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3.7.6
The EMI module includes the enhanced SDRAM/LPDDR memory controller (ESDCTL), NAND Flash
controller (NFC), and wireless external interface module (WEIM). The following subsections give timing
information for these submodules.
3.7.6.1
3.7.6.1.1
The following diagrams and tables specify the timings related to the SDRAMC module which interfaces
SDRAM.
Freescale Semiconductor
The output SCLK transition time is tested with 25 pF drive.
T
T
T
T
wait
sclk
per
ipg
t10
t11
t12
t13
t14
ID
t5’
t6’
t7’
t4
t5
t6
t7
t8
t9
= CSPI main clock IPG_CLOCK period
= CSPI reference baud rate clock period (PERCLK2)
= Wait time, as specified in the sample period control register
= CSPI clock period
CSPI SCLK transition time
SS n output pulse width
SS n input pulse width
SS n output asserted to first SCLK edge (SS output setup
time)
SS n input asserted to first SCLK edge (SS input setup
time)
CSPI master: Last SCLK edge to SS n negated (SS
output hold time)
CSPI slave: Last SCLK edge to SS n negated (SS input
hold time)
CSPI master: CSPI1_RDY low to SS n asserted
(CSPI1_RDY setup time)
CSPI master: SS n negated to CSPI1_RDY low
Output data setup time
Output data hold time
Input data setup time
Input data hold time
Pause between data word
External Memory Interface (EMI) Timing
ESDCTL Electrical Specifications
SDRAM Memory Controller
i.MX25 Applications Processor for Automotive Products, Rev. 4
Parameter Description
Table 41. CSPI Interface Timing Parameters (continued)
Symbol
t
t
t
t
t
t
Sdatao
Hdatao
t
t
t
Hdatai
t
t
Sdatai
pause
t
t
Wsso
Ssso
Hsso
t
Wssi
Srdy
Hrdy
Sssi
Hssi
pr
1
(t
t
2T
t
clkoL
clkoL
clkiL
t
clkiL
Minimum
sclk
T
ipg
3T
2T
2T
T
or t
T
or t
or t
T
2
2.6
30
per
or t
ipg
per
0
0
0
sclk
sclk
+ 0.5
+T
per
clkiH
clkoH
clkoH
4
5
clkiH
wait
) –
or
or
3
Maximum
5T
8.5
—
—
—
—
—
—
—
—
—
—
—
—
per
Units
ns
—
—
—
—
—
ns
—
ns
—
—
ns
ns
ns
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