MCIMX255AJM4A Freescale, MCIMX255AJM4A Datasheet - Page 85

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MCIMX255AJM4A

Manufacturer Part Number
MCIMX255AJM4A
Description
Manufacturer
Freescale
Datasheet

Specifications of MCIMX255AJM4A

Lead Free Status / RoHS Status
Compliant

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3.7.9.1.2
The transmitter functions correctly up to an FEC_TX_CLK maximum frequency of 25 MHz + 1%. There
is no minimum frequency requirement. Additionally, the processor clock frequency must exceed twice the
FEC_TX_CLK frequency.
Figure 56
in the figure.
1
3.7.9.1.3
Figure 57
in the figure.
Freescale Semiconductor
M5
M6
M7
M8
FEC_TX_EN, FEC_TX_CLK, and FEC_TXD0 have the same timing in 10-Mbps 7-wire interface mode.
ID
FEC_TXD[3:0] (outputs)
FEC_TX_CLK (input)
FEC_TX_CLK to FEC_TXD[3:0], FEC_TX_EN, FEC_TX_ER invalid
FEC_TX_CLK to FEC_TXD[3:0], FEC_TX_EN, FEC_TX_ER valid
FEC_TX_CLK pulse width high
FEC_TX_CLK pulse width low
shows MII transmit signal timings.
shows MII asynchronous input timings.
FEC_CRS, FEC_COL
FEC_TX_EN
FEC_TX_ER
MII Transmit Signal Timing (FEC_TXD[3:0], FEC_TX_EN, FEC_TX_ER, and
FEC_TX_CLK)
MII Asynchronous Inputs Signal Timing (FEC_CRS and FEC_COL)
i.MX25 Applications Processor for Automotive Products, Rev. 4
Figure 56. MII Transmit Signal Timing Diagram
Figure 57. MII Async Inputs Timing Diagram
Characteristic
Table 61. MII Transmit Signal Timing
1
Table 61
M5
M6
Table 62
M7
describes the timing parameters (M5–M8) shown
describes the timing parameter (M9) shown
M9
Min.
35%
35%
M8
5
Max.
65%
65%
20
FEC_TX_CLK period
FEC_TX_CLK period
Unit
ns
ns
85

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