MCIMX255AJM4A Freescale, MCIMX255AJM4A Datasheet - Page 92

• Manufacturer Part Number: MCIMX255AJM4A
• Manufacturer: Freescale

Specifications of MCIMX255AJM4A

• Lead Free Status / RoHS Status: Compliant

3.7.12
Figure 65
Table 70
1
92
T is pixel clock period
HSYNC
HSYNC
VSYNC
LSCLK
T1
T2
T3
T4
T5
T6
ID
LD
list the timing parameters used in the associated figures.
and
Liquid Crystal Display Controller (LCDC) Timing
Pixel clock period
HSYNC width
LD setup time
LD hold time
Wait between HSYNC and VSYNC rising edge
Wait between last data and HSYNC rising edge
Figure 66
T2
T5
Line 1
i.MX25 Applications Processor for Automotive Products, Rev. 4
show LCDC timing in non-TFT and TFT mode respectively, and
Line 2
T3
T1
Table 69. LCDC Non-TFT Mode Timing Parameters
Figure 65. LCDC Non-TFT Mode Timing Diagram
Description
T4
Min.
22.5
1
5
5
2
1
Line n
Line 1
Freescale Semiconductor
Max.
1000
—
—
—
—
—
T6
Table 69
Unit
ns
T
ns
ns
T
T
and
1
1
1