KSZ8851SNLI Micrel Inc, KSZ8851SNLI Datasheet - Page 47
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KSZ8851SNLI
Manufacturer Part Number
KSZ8851SNLI
Description
Manufacturer
Micrel Inc
Datasheet
1.KSZ8851SNLI.pdf
(80 pages)
Specifications of KSZ8851SNLI
Operating Supply Voltage (typ)
3.3V
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
32
Lead Free Status / RoHS Status
Supplier Unconfirmed
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Wakeup Frame 2 Byte Mask 3 Register (0x5A – 0x5B): WF2BM3
This register contains the last 16 bytes mask values of the Wake up frame 2 pattern. Setting bit 0 selects the 49th byte
of the Wake up frame 2. Setting bit 15 selects the 64th byte of the Wake up frame 2.
0x5C – 0x5F: Reserved
Wakeup Frame 3 CRC0 Register (0x60 – 0x61): WF3CRC0
This register contains the expected CRC values of the Wake up frame 3 pattern. The value of the CRC calculated is
based on the IEEE 802.3 Ethernet standard, it is taken over the bytes specified in the wake-up byte mask registers.
Wakeup Frame 3 CRC1 Register (0x62 – 0x63): WF3CRC1
This register contains the expected CRC values of the Wake up frame 3 pattern. The value of the CRC calculated is
based on the IEEE 802.3 Ethernet standard, it is taken over the bytes specified in
the wake-up byte mask registers.
Wakeup Frame 3 Byte Mask 0 Register (0x64 – 0x65): WF3BM0
This register contains the first 16 bytes mask values of the Wake up frame 3 pattern. Setting bit 0 selects the first byte
of the Wake up frame 3, setting bit 15 selects the 16th byte of the Wake up frame 3.
Wakeup Frame 3 Byte Mask 1 Register (0x66 – 0x67): WF3BM1
This register contains the next 16 bytes mask values of the Wake up frame 3 pattern. Setting bit 0 selects the 17th byte
of the Wake up frame 3. Setting bit 15 selects the 32nd byte of the Wake up frame 3.
Wakeup Frame 3 Byte Mask 2 Register (0x68 – 0x69): WF3BM2
This register contains the next 16 bytes mask values of the Wake up frame 3 pattern. Setting bit 0 selects the 33rd byte
of the Wake up frame 3. Setting bit 15 selects the 48th byte of the Wake up frame 3.
August 2009
Micrel, Inc.
Bit
15-0
Bit
15-0
Bit
15-0
Bit
15-0
Bit
15-0
Bit
15-0
Default Value
0
Default Value
0
Default Value
0
Default Value
0
Default Value
0
Default Value
0
R/W
RW
R/W
RW
R/W
RW
R/W
RW
R/W
RW
R/W
RW
Description
WF2BM3
Wake-up frame 2 Byte Mask 3. The last 16 bytes mask covering bytes 49 to 64 of a
Wake-up frame 2 pattern.
Description
WF3CRC0
Wake-up frame 3 CRC (lower 16 bits). The expected CRC value of a Wake up frame 3
pattern.
Description
WF3CRC1
Wake-up frame 3 CRC (upper 16 bits). The expected CRC value of a Wake up frame 3
pattern.
Description
WF3BM0
Wake up Frame 3 Byte Mask 0. The first 16 byte mask of a Wake up frame 3 pattern.
Description
WF3BM1
Wake up Frame 3 Byte Mask 1. The next 16 bytes mask covering bytes 17 to 32 of a
Wake up frame 3 pattern.
Description
WF3BM2
Wake up Frame 3 Byte Mask 2. The next 16 bytes mask covering bytes 33 to 48 of a
Wake up frame 3 pattern.
47
KSZ8851SNL/SNLI
M9999-083109-2.0